Re: [USRP-users] Building RFNoC Image with OOT Module on X310 - Module not found

and best regards, Felix > On Wed, Jan 8, 2020 at 8:00 AM Felix Greiwe via USRP-users < > usrp-users@lists.ettus.com> wrote: > >> Hi EJ, >> >> thank you for your answer! To make my error more traceable, I created a >> new OOT Module and added the default gain block

Re: [USRP-users] Building RFNoC Image with OOT Module on X310 - Module not found

rkers or print statements > if you want)... > > EJ > > On Sat, Jan 4, 2020, 5:10 AM Felix Greiwe via USRP-users < > usrp-users@lists.ettus.com> wrote: > >> Hello again, >> >> has no one an idea? I have still not managed to get it working.. >> I would

Re: [USRP-users] Building RFNoC Image with OOT Module on X310 - Module not found

Hello again, has no one an idea? I have still not managed to get it working.. I would take any advice! Best regards, Felix > Hello together, > > recently I installed the whole UHD/GNU-Radio Toolchain on a fresh install > of Kubuntu 18.04 LTS. I followed the instructions from >

[USRP-users] Building RFNoC Image with OOT Module on X310 - Module not found

Hello together, recently I installed the whole UHD/GNU-Radio Toolchain on a fresh install of Kubuntu 18.04 LTS. I followed the instructions from https://kb.ettus.com/Getting_Started_with_RFNoC_Development and used the Pybombs install. (I ran into a lot of problems there and had to install a lot

Re: [USRP-users] RFNoC Crossbar and Block data rates

data? Best regards, Felix > On Thu, Sep 19, 2019 at 9:39 AM Felix Greiwe via USRP-users < > usrp-users@lists.ettus.com> wrote: > >> Hello together, >> >> I have some questions concerning clock speeds and the corresponding data >> rates on a USRP x310

[USRP-users] RFNoC Crossbar and Block data rates

Hello together, I have some questions concerning clock speeds and the corresponding data rates on a USRP x310 (FPGA). As far as I know, there are two different clock speeds on the FPGA, the ce_clk=200MHz, and the bus_clk - I did not find clock speed for this one. Is it true, that the ce_clk

Re: [USRP-users] Phase Sync between to UBX-160 Daugtherboards using RFNoC Radio

(When I >> use >> the UHD_USRP_SINK Block with two inputs, the phase seems to be constant >> with each restart even without tuning them with timed commands. This >> behauviour is the goal; only that I want to use RFnoC instead) >> >> Thank you for your help and be

Re: [USRP-users] Phase Sync between to UBX-160 Daugtherboards using RFNoC Radio

t GRC manual section >> [1], >> and an example snippet of tuning with timed commands in the UHD Manual >> [2]. >> Doing this correctly should ensure that you are able to keep a >> consistent >> phase offset between your TX channels at a given frequency. >>

Re: [USRP-users] Phase Sync between to UBX-160 Daugtherboards using RFNoC Radio

e. I don't > think this will solve your problem, but if the blocks are doing the same > thing, may help take a variable out of the equation. > > Sam > > [1] > https://www.gnuradio.org/doc/doxygen/classgr_1_1uhd_1_1usrp__block.html > [2] https://files.ettus.com/manual/page_sync.html#sy

[USRP-users] Phase Sync between to UBX-160 Daugtherboards using RFNoC Radio

Hello together, I am trying to transmit one complex cosine from both TX - Antenna of my USRP-x310 with two UBX-160 Daugtherboards. I am transmitting a cosine with the frequency of 100 kHz and the center frequency of my RFNoC Radio Blocks is 2.45 GHz. So basically I see a peak at 2.45 Ghz + 100

[USRP-users] RFNoC Issue with 32 Bit Axi Stream | Error in Concat to 64 Bit | VHDL

Hello together, recently i started RFNoC development using an USRP x310. After finishing the RFNoC getting started Guide i created an OOT Module including VHDL. First i simply forwarded the Input Data to the output which worked just fine. After that i wanted to add a constant, for example 5_dec.,