[USRP-users] Add AXI Uartlite to E310 FPGA

2018-06-29 Thread Gorur, Anisha - 0662 - MITLL via USRP-users
Hi, I'm trying to add an AXI Uartlite (https://www.xilinx.com/support/documentation/ip_documentation/axi_uartlite/v2_0/pg142-axi-uartlite.pdf) module to the E310 and will be using two GPIO pins for the serial TX/RX. I've added the IP to e310.v, and hooked it up to twp GPIO pins and the AXI

[USRP-users] Rebuilding File System for E310

2018-05-15 Thread Gorur, Anisha - 0662 - MITLL via USRP-users
Hello, I'm trying to rebuild the E310 file system as shown here: http://files.ettus.com/manual/page_usrp_e3x0.html#e3x0_image_building . I had to make one minor change, my network doesn't allow me to pull files from "git://" sites, so I used the https:// mirror for all of the repo fetching.