[USRP-users] Opening Vivado GUI during FPGA image build
It's been a while since I did this, but I had issues bringing up the gui as
well. Here is a copy/paste of some notes I wrote for myself:
* Edit the file "$PREFIX/bin/rfnoc_image_builder".
* Find the line "gui=args.
thing I had to change so my Vivado
path was set correctly.
Hope this helps,
Jim
From: USRP-users on behalf of Mark D via
USRP-users
Sent: Tuesday, February 9, 2021 8:48 AM
To: 'Wade Fife'
Cc: 'usrp-users@lists.ettus.com'
Subject: Re: [USRP-us
k.
Thanks again for your help,
Mark
From: Wade Fife mailto:wade.f...@ettus.com>>
Sent: 02 February 2021 17:45
To: Mark D mailto:md...@hmgcc.gov.uk>>
Cc: usrp-users@lists.ettus.com<mailto:usrp-users@lists.ettus.com>
Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image buil
Sent: 02 February 2021 17:45
To: Mark D
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build
Hi Mark,
This is curious. If I recall, someone else was having trouble with -g, but it
worked for me last time I tried it. I will try it again to see if I
@lists.ettus.com
> *Subject:* [USRP-users] Opening Vivado GUI during FPGA image build
>
>
>
> I’m using UHD 4.0 and building an FPGA for the E320 USRP.
>
>
>
> I’m trying to follow the guide for debugging FPGA images on the Ettus
> website AN-121.
>
>
>
> I’m
users] Opening Vivado GUI during FPGA image build
I'm using UHD 4.0 and building an FPGA for the E320 USRP.
I'm trying to follow the guide for debugging FPGA images on the Ettus website
AN-121.
I'm using the rfnoc_image_builder command to build the image, and have added
the -g op
I'm using UHD 4.0 and building an FPGA for the E320 USRP.
I'm trying to follow the guide for debugging FPGA images on the Ettus website
AN-121.
I'm using the rfnoc_image_builder command to build the image, and have added
the -g option to open the GUI during the build process: udd_image_builder
