On 02/05/2023 16:44, Brian Padalino wrote:
You can get around the RFNoC DUC issue yourself by writing your own
interpolation block - or your own modulation block - and output at 200
Msps the exact samples you want to transmit. Beyond that, it just
seems like some assumptions that Ettus/UHD
On Tue, May 2, 2023 at 3:25 PM wrote:
> Try interpolating on the host to 200 Msps and see how things go.
>
> I’m not sure what you are suggesting. If I take the “bad” recorded file
> and I interpolate from 25 to 200 Msps, it’s not going to make chopped tail
> the appropriate width.
>
> I also
On 02/05/2023 14:15, Brian Padalino wrote:
On Tue, May 2, 2023 at 2:04 PM wrote:
What is the sample rate of your transmitted samples? If it
isn't 200 Msps
for the X310, then you are using the DUC.
I use a couple different sample rates. The plots I showed earlier
On Tue, May 2, 2023 at 2:04 PM wrote:
> What is the sample rate of your transmitted samples? If it isn't 200 Msps
> for the X310, then you are using the DUC.
>
> I use a couple different sample rates. The plots I showed earlier were
> taken at 25 MSPs.
>
Try interpolating on the host to 200
> What is the sample rate of your transmitted samples? If it isn't 200 Msps \
> for the X310, then you are using the DUC.
I use a couple different sample rates. The plots I showed earlier were taken at
25 MSPs.
> Not adding 0's to the end of a burst which you intend to be interpolated is \
>
On Tue, May 2, 2023 at 1:30 PM wrote:
> Are you using any interpolation or is it going directly to the TX DAC?
>
> I’m using a base UHD FPGA image at the moment. I tune the frequency
> directly using the analog LO. The DSP component of the tune request is set
> to 0. Is there some other setting
> Are you using any interpolation or is it going directly to the TX DAC?
I’m using a base UHD FPGA image at the moment. I tune the frequency directly
using the analog LO. The DSP component of the tune request is set to 0. Is
there some other setting that may have triggered the DUC?
I accidentally attached the “fixed” plot twice. Attached is the trimmed sample
plot.
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On Tue, May 2, 2023 at 1:01 PM wrote:
> Hello,
>
> I have a C++ application I developed using x310s running on RHEL9 and UHD
> 4.2 currently. I’ve noticed recently that the final ~25 samples of every
> transmit are heavily distorted or nonexistent. I am able to replicate this
> behavior using a
