Hi Rob,
You can increase the maximum socket buffer sizes by following the
instructions here:
http://files.ettus.com/manual/page_transport.html#transport_udp_linux
I recommend setting the default and max values as follows:
sudo sysctl -w net.core.rmem_default=200
sudo sysctl -w
Hi Rob,
I will follow up with you off list with some notes I have for setting up
DPDK. We will be publishing an app note on it soon.
Regards,
Nate Temple
On Mon, Sep 9, 2019 at 4:13 PM Rob Kossler wrote:
> Thanks Michael,
> This info was very helpful.
>
> Regarding "recv_buff_size", I tried
Thanks Michael,
This info was very helpful.
Regarding "recv_buff_size", I tried setting to 100M and received a warning
that it could not do so because rmem_max was only 33M. Given that my
rmem_max was set all along to 33M, would the recv_buff_size default to 33M
or does it default to something
Hi Rob,
I would recommend not using the DMA FIFO block. Although the DMA FIFO
block should work, setting a larger socket buffer on the host or using DPDK
are much better options. To use a larger socket buffer, just use the
device argument "recv_buff_size=" and set the to something
reasonably
Hi Nate,
I looked at the link you sent (performance tuning tips) and your email.
Here are a few comments / questions:
- Regarding my initial question, what could be the cause of WORSE
performance when I inserted the DmaFIFO in the receive chain of my RFNoC
graph? Recall the
Hi Nate,
I'm using UHD 3.14.0.1. I am not using DPDK.
Regarding the tuning, I think I was not clear in my email. I have no
trouble streaming to RAM disk using the standard Radio->DDC->host graph. I
mentioned that I was running 2x50MS/s, but I can go up to 2x200MS/s with
success. My issue is
Hi Rob,
What version of UHD are you using?
2x RX 50 MS/s streams should work without much issue with a fast enough
host, especially to a ram disk.
Are you using DPDK? DPDK support for X3xx was recently added to UHD and
will reduce the overhead on the host side, which can help quite a bit. Some
Hi,
As part of an effort to improve capability to store incoming receive chain
samples to files on my SSD without errors ('O' or 'D'), I decided to wire
an X310 noc graph to include the DmaFIFO. My thought was that the DmaFIFO
could better tolerate varying rates of sample consumption at the OS.
