Re: [Xen-devel] [PATCH 1/2] VT-d: make XSA-59 workaround fully cover XeonE5/E7 v2

2015-03-18 Thread Jan Beulich
>>> On 17.03.15 at 18:39, wrote: > Note that the following Nehalem/Westmere chipsets should be included in this > list: > > Nehalem - 0x40, 0x2c01, 0x2c41, 0x313x > Westmere - 0x2c70, 0x2d81, 0xd15x 0x0040 is already there (as a desktop one). The others being server ones again would belong into

Re: [Xen-devel] [PATCH 1/2] VT-d: make XSA-59 workaround fully cover XeonE5/E7 v2

2015-03-17 Thread Dugger, Donald D
Note that the following Nehalem/Westmere chipsets should be included in this list: Nehalem - 0x40, 0x2c01, 0x2c41, 0x313x Westmere - 0x2c70, 0x2d81, 0xd15x -- Don Dugger "Censeo Toto nos in Kansa esse decisse." - D. Gale Ph: 303/443-3786 -Original Message- From: Jan Beulich [mailto:jbeu

[Xen-devel] [PATCH 1/2] VT-d: make XSA-59 workaround fully cover XeonE5/E7 v2

2014-12-19 Thread Jan Beulich
So far only the VT-d UR masking was being done for them. Signed-off-by: Jan Beulich --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -440,6 +440,9 @@ void pci_vtd_quirk(const struct pci_dev seg, bus, dev, func); break; +/* X