On 26/04/2017 07:07, Jan Beulich wrote:
On 25.04.17 at 17:24, wrote:
>> On 24/04/17 18:54, Mohit Gambhir wrote:
>>> This patch adds Intel PMU MSR addresses as macros for VPMU testing
>>>
>>> Signed-off-by: Mohit Gambhir
>>> ---
>>>
>>> On 25.04.17 at 17:24, wrote:
> On 24/04/17 18:54, Mohit Gambhir wrote:
>> This patch adds Intel PMU MSR addresses as macros for VPMU testing
>>
>> Signed-off-by: Mohit Gambhir
>> ---
>> arch/x86/include/arch/msr-index.h | 11 +++
On 04/25/2017 11:24 AM, Andrew Cooper wrote:
On 24/04/17 18:54, Mohit Gambhir wrote:
This patch adds Intel PMU MSR addresses as macros for VPMU testing
Signed-off-by: Mohit Gambhir
---
arch/x86/include/arch/msr-index.h | 11 +++
1 file changed, 11
On 24/04/17 18:54, Mohit Gambhir wrote:
> This patch adds Intel PMU MSR addresses as macros for VPMU testing
>
> Signed-off-by: Mohit Gambhir
> ---
> arch/x86/include/arch/msr-index.h | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git
On 04/25/2017 04:36 AM, Jan Beulich wrote:
On 24.04.17 at 19:54, wrote:
--- a/arch/x86/include/arch/msr-index.h
+++ b/arch/x86/include/arch/msr-index.h
@@ -38,6 +38,17 @@
#define MSR_GS_BASE 0xc101
#define MSR_SHADOW_GS_BASE
>>> On 24.04.17 at 19:54, wrote:
> --- a/arch/x86/include/arch/msr-index.h
> +++ b/arch/x86/include/arch/msr-index.h
> @@ -38,6 +38,17 @@
> #define MSR_GS_BASE 0xc101
> #define MSR_SHADOW_GS_BASE 0xc102
>
> +#define
This patch adds Intel PMU MSR addresses as macros for VPMU testing
Signed-off-by: Mohit Gambhir
---
arch/x86/include/arch/msr-index.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/x86/include/arch/msr-index.h
b/arch/x86/include/arch/msr-index.h