RE: [PATCH 2/2] x86/vmx: Support for CPUs without model-specific LBR

2023-01-11 Thread Tian, Kevin
> From: Andrew Cooper > Sent: Monday, January 9, 2023 8:08 PM > > Ice Lake (server at least) has both Arch LBR and model-specific LBR. Sapphire > Rapids does not have model-specific LBR at all. I.e. On SPR and later, > model_specific_lbr will always be NULL, so we must make changes to avoid >

Re: [PATCH 2/2] x86/vmx: Support for CPUs without model-specific LBR

2023-01-10 Thread Jan Beulich
On 09.01.2023 13:08, Andrew Cooper wrote: > Ice Lake (server at least) has both Arch LBR and model-specific LBR. Sapphire > Rapids does not have model-specific LBR at all. I.e. On SPR and later, > model_specific_lbr will always be NULL, so we must make changes to avoid > reliably hitting the

[PATCH 2/2] x86/vmx: Support for CPUs without model-specific LBR

2023-01-09 Thread Andrew Cooper
Ice Lake (server at least) has both Arch LBR and model-specific LBR. Sapphire Rapids does not have model-specific LBR at all. I.e. On SPR and later, model_specific_lbr will always be NULL, so we must make changes to avoid reliably hitting the domain_crash(). The Arch LBR spec states that CPUs