Re: [PATCH v4 2/2] x86/intel: insert Ice Lake-SP and Ice Lake-D model numbers

On 14.04.2021 06:40, Igor Druzhinin wrote: > LBR, C-state MSRs should correspond to Ice Lake desktop according to > SDM rev. 74 for both models. > > Ice Lake-SP is known to expose IF_PSCHANGE_MC_NO in IA32_ARCH_CAPABILITIES MSR > (as advisory tells and Whitley SDP confirms) which means the

[PATCH v4 2/2] x86/intel: insert Ice Lake-SP and Ice Lake-D model numbers

LBR, C-state MSRs should correspond to Ice Lake desktop according to SDM rev. 74 for both models. Ice Lake-SP is known to expose IF_PSCHANGE_MC_NO in IA32_ARCH_CAPABILITIES MSR (as advisory tells and Whitley SDP confirms) which means the erratum is fixed in hardware for that model and therefore