On 07/15/2016 11:27 PM, Paul Fertser wrote: > Hey Benjamin, > > On Fri, Jul 15, 2016 at 11:17:47PM +0200, Benjamin Larsson wrote: >> Care to implement analog mux relay switching also ? > > I can try but I haven't found any schematics or detailed enough > descriptions of devices requiring that on the wiki. > > The one I have here is a very loosy USBEE AxPro which is badly > designed and manufactured: wrong R2 resistor divisor value (Ohms > instead of kOhms), suboptimal (to say the least) opamps arrangement, > and, the most annoying, plenty of bogus ~max and ~min spikes when the > input is close to 0V and in some other cases. This goes away if I > touch U2 Vcc and GND pads with my finger or if I attach a wire (adding > some capacitance) to CLK; I suspect both lack of series resistor in > the CLK trace and weird GND layout... >
Can you document the device? It sounds interesting :) And PA0 should be the relay. http://sigrok.org/wiki/Sysclk_AX-Pro MvH Benjamin Larsson ------------------------------------------------------------------------------ What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports.http://sdm.link/zohodev2dev _______________________________________________ sigrok-devel mailing list sigrok-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sigrok-devel
