Hello,
Many users of Sigrok are looking for the possibility of issuing a
timestamp.
In my search processing the trigger point am with sigrok-cli in the
place of
session.c; void datafeed_in
case SR_DF_TRIGGER:
g_debug ("cli: Received SR_DF_TRIGGER.");
triggered = 1;
arrives.
I had thought that this source is jumped by all LA, because the
variable "triggered" will be used later.
Unfortunately, my LA DSLogic Pro behaves differently than a Saleae16
clone. The DSLogic does not seem to deliver the header packet
SR_DF_TRIGGER.
Is this a bug? Or can it be solved with DSlogic just like that ?
here is an edition of Saleae16-clone:
$ ./sigrok-cli --driver saleae-logic16 --config samplerate=2000k
--triggers 0=r -l 5 --samples 1000 sr: [00:00.000000] log: libsigrok
loglevel set to 5. sr: [00:00.000063] backend: libsigrok
0.6.0-git-cdb134e/4:0:0 (rt: 0.6.0-git-cdb134e/4:0:0). sr:
[00:00.000148] backend: Libs: glib 2.42.1 (rt: 2.42.1/4201:1), libzip
0.11.2, libserialport 0.1.1/1:0:1 (rt: 0.1.1/1:0:1), libusb-1.0
1.0.18.10866, libftdi 1.4. sr: [00:00.000178] backend: Host:
x86_64-unknown-linux-gnu, little-endian. sr: [00:00.000202] backend:
SCPI backends: TCP, RPC, serial, USBTMC. sr: [00:00.000222] backend:
Firmware search paths: sr: [00:00.000243] resource: SIGROK_FIRMWARE_DIR
environment variable not set, ignoring. sr: [00:00.000296] backend:
- /home/jo/.local/share/sigrok-firmware sr: [00:00.000316] backend:
-
/home/jo/sigrok_check_patch_threshold_from_git_29_04_2018/share/sigrok-firmware
sr: [00:00.000335] backend: - /usr/share/gnome/sigrok-firmware sr:
[00:00.000352] backend: - /usr/local/share/sigrok-firmware sr:
[00:00.000369] backend: - /usr/share/sigrok-firmware sr:
[00:00.000412] backend: Sanity-checking all drivers. sr: [00:00.000437]
backend: Sanity-checking all input modules. sr: [00:00.000457] backend:
Sanity-checking all output modules. sr: [00:00.000474] backend:
Sanity-checking all transform modules. srd: libsigrokdecode loglevel
set to 5. sr: [00:00.004867] saleae-logic16: Found a Logic16 device.
sr: [00:00.004906] hwdriver: Scan found 1 devices (saleae-logic16). sr:
[00:00.004944] device: saleae-logic16: Opening device instance. sr:
[00:00.004950] saleae-logic16: Firmware upload was not needed. sr:
[00:00.006928] saleae-logic16: mcupro Saleae16 detected. sr:
[00:00.020167] saleae-logic16: Opened device on 1.121 (logical) /
usb/1-1 (physical), interface 0. sr: [00:00.020239] hwdriver:
sr_config_set(): key 30000 (samplerate) sdi 0x1591b90 cg NULL -> uint64
2000000 sr: [00:00.020265] hwdriver: sr_config_list(): key 30014
(triggermatch) sdi 0x1591b90 cg NULL -> [1, 2, 3, 4, 5] sr:
[00:00.020287] hwdriver: sr_config_set(): key 50001 (limit_samples) sdi
0x1591b90 cg NULL -> uint64 1000 sr: [00:00.020305] session: Checking
trigger: sr: [00:00.020310] session: Stage 0 match on channel 0, match
3 sr: [00:00.020319] session: Using thread-default main context. sr:
[00:00.020323] session: Starting. sr: [00:00.020327] hwdriver:
saleae-logic16: Starting acquisition. sr: [00:00.022244] std:
saleae-logic16: Sending SR_DF_HEADER packet. sr: [00:00.022259]
session: bus: Received SR_DF_HEADER packet. cli: Received SR_DF_HEADER.
sr: [00:00.022320] hwdriver: sr_config_get(): key 30000 (samplerate)
sdi 0x1591b90 cg NULL -> uint64 2000000 sr: [00:00.032920]
saleae-logic16: receive_transfer(): status LIBUSB_SUCCESS /
LIBUSB_TRANSFER_COMPLETED received 40448 bytes. sr: [00:00.033909]
session: bus: Received SR_DF_TRIGGER packet. cli: Received
SR_DF_TRIGGER. alp: Now it's 09:34AM. sr: [00:00.033979] session: bus:
Received SR_DF_LOGIC packet (2000 bytes, unitsize = 2). cli: Received
SR_DF_LOGIC (2000 bytes, unitsize = 2). sr: [00:00.034002] hwdriver:
sr_config_get(): key 30000 (samplerate) sdi 0x1591b90 cg NULL -> uint64
2000000 libsigrok 0.6.0-git-cdb134e Acquisition with 16/16 channels at
2 MHz 0:11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111
and then my DSLogicPro
$
SIGROK_FIRMWARE_DIR=/usr/local/share/sigrok-firmware/dslogic_firmware/v0_97
./sigrok-cli
--driver dreamsourcelab-dslogic --config samplerate=2000k --triggers
0=r -l 5 --samples 1000 sr: [00:00.000001] log: libsigrok loglevel set
to 5. sr: [00:00.000047] backend: libsigrok 0.6.0-git-cdb134e/4:0:0
(rt: 0.6.0-git-cdb134e/4:0:0). sr: [00:00.000099] backend: Libs: glib
2.42.1 (rt: 2.42.1/4201:1), libzip 0.11.2, libserialport 0.1.1/1:0:1
(rt: 0.1.1/1:0:1), libusb-1.0 1.0.18.10866, libftdi 1.4. sr:
[00:00.000118] backend: Host: x86_64-unknown-linux-gnu, little-endian.
sr: [00:00.000133] backend: SCPI backends: TCP, RPC, serial, USBTMC.
sr: [00:00.000145] backend: Firmware search paths: sr: [00:00.000176]
backend: - /usr/local/share/sigrok-firmware/dslogic_firmware/v0_97 sr:
[00:00.000189] backend: - /home/jo/.local/share/sigrok-firmware sr:
[00:00.000201] backend:
-
/home/jo/sigrok_check_patch_threshold_from_git_29_04_2018/share/sigrok-firmware
sr: [00:00.000212] backend: - /usr/share/gnome/sigrok-firmware sr:
[00:00.000223] backend: - /usr/local/share/sigrok-firmware sr:
[00:00.000233] backend: - /usr/share/sigrok-firmware sr:
[00:00.000264] backend: Sanity-checking all drivers. sr: [00:00.000281]
backend: Sanity-checking all input modules. sr: [00:00.000293] backend:
Sanity-checking all output modules. sr: [00:00.000305] backend:
Sanity-checking all transform modules. srd: libsigrokdecode loglevel
set to 5. sr: [00:00.003036] ezusb: uploading firmware to device on
1.118 sr: [00:00.003150] ezusb: setting CPU reset mode on... sr:
[00:00.003254] resource: Opened
'/usr/local/share/sigrok-firmware/dslogic_firmware/v0_97/dreamsourcelab-dslogic-pro-fx2.fw'.
sr: [00:00.003329] ezusb: Uploading firmware
'dreamsourcelab-dslogic-pro-fx2.fw'. sr: [00:00.003682] ezusb: Uploaded
4096 bytes. sr: [00:00.004046] ezusb: Uploaded 4024 bytes. sr:
[00:00.004079] ezusb: Firmware upload done. sr: [00:00.004091] ezusb:
setting CPU reset mode off... sr: [00:00.004152] hwdriver: Scan found 1
devices (dreamsourcelab-dslogic). sr: [00:00.004198] device:
dreamsourcelab-dslogic: Opening device instance. sr: [00:00.004212]
dreamsourcelab-dslogic: Waiting for device to reset. sr: [00:00.404387]
dreamsourcelab-dslogic: Waited 400ms. sr: [00:00.504522]
dreamsourcelab-dslogic: Waited 500ms. sr: [00:00.604679]
dreamsourcelab-dslogic: Waited 600ms. sr: [00:00.704821]
dreamsourcelab-dslogic: Waited 700ms. sr: [00:00.804929]
dreamsourcelab-dslogic: Waited 800ms. sr: [00:00.905063]
dreamsourcelab-dslogic: Waited 900ms. sr: [00:01.005181]
dreamsourcelab-dslogic: Waited 1001ms. sr: [00:01.105295]
dreamsourcelab-dslogic: Waited 1101ms. sr: [00:01.205414]
dreamsourcelab-dslogic: Waited 1201ms. sr: [00:01.305550]
dreamsourcelab-dslogic: Waited 1301ms. sr: [00:01.405659]
dreamsourcelab-dslogic: Waited 1401ms. sr: [00:01.505781]
dreamsourcelab-dslogic: Waited 1501ms. sr: [00:01.605895]
dreamsourcelab-dslogic: Waited 1601ms. sr: [00:01.706001]
dreamsourcelab-dslogic: Waited 1701ms. sr: [00:01.806126]
dreamsourcelab-dslogic: Waited 1801ms. sr: [00:01.806384]
dreamsourcelab-dslogic: Opened device on 1.119 (logical) / usb/1-1
(physical), interface 0, firmware 1.1. sr: [00:01.806409]
dreamsourcelab-dslogic: Detected REVID=1, it's a Cypress CY7C68013A
(FX2LP). sr: [00:01.806419] dreamsourcelab-dslogic: Device came back
after 1801ms. sr: [00:01.806449] dreamsourcelab-dslogic: Uploading FPGA
firmware 'dreamsourcelab-dslogic-pro-fpga.fw'. sr: [00:01.806486]
resource: Opened
'/usr/local/share/sigrok-firmware/dslogic_firmware/v0_97/dreamsourcelab-dslogic-pro-fpga.fw'.
sr: [00:01.862399] dreamsourcelab-dslogic: Uploaded 341436/341436
bytes. sr: [00:01.862465] dreamsourcelab-dslogic: FPGA firmware upload
done. sr: [00:01.863608] hwdriver: sr_config_set(): key 30000
(samplerate) sdi 0x1152620 cg NULL -> uint64 2000000 sr: [00:01.863646]
hwdriver: sr_config_list(): key 30014 (triggermatch) sdi 0x1152620 cg
NULL -> [1, 2, 3, 4, 5] sr: [00:01.863670] hwdriver: sr_config_set():
key 50001 (limit_samples) sdi 0x1152620 cg NULL -> uint64 1000 sr:
[00:01.863690] session: Checking trigger: sr: [00:01.863695] session:
Stage 0 match on channel 0, match 3 sr: [00:01.863705] session: Using
thread-default main context. sr: [00:01.863710] session: Starting. sr:
[00:01.863713] hwdriver: dreamsourcelab-dslogic: Starting acquisition.
sr: [00:01.863926] dreamsourcelab-dslogic: Configuring FPGA. sr:
[00:01.864997] dreamsourcelab-dslogic: Getting trigger. sr:
[00:02.085648] dreamsourcelab-dslogic: tpos real_pos 1431655765
ram_saddr 81 cnt 440000 sr: [00:02.085681] dreamsourcelab-dslogic:
submitting transfer: 0 sr: [00:02.085709] dreamsourcelab-dslogic:
submitting transfer: 1 sr: [00:02.085721] dreamsourcelab-dslogic:
submitting transfer: 2 sr: [00:02.085732] dreamsourcelab-dslogic:
submitting transfer: 3 sr: [00:02.085742] dreamsourcelab-dslogic:
submitting transfer: 4 sr: [00:02.085754] dreamsourcelab-dslogic:
submitting transfer: 5 sr: [00:02.085765] dreamsourcelab-dslogic:
submitting transfer: 6 sr: [00:02.085775] dreamsourcelab-dslogic:
submitting transfer: 7 sr: [00:02.085785] dreamsourcelab-dslogic:
submitting transfer: 8 sr: [00:02.085793] std: dreamsourcelab-dslogic:
Sending SR_DF_HEADER packet. sr: [00:02.085806] session: bus: Received
SR_DF_HEADER packet. cli: Received SR_DF_HEADER. sr: [00:02.085886]
hwdriver: sr_config_get(): key 30000 (samplerate) sdi 0x1152620 cg NULL
-> uint64 2000000 sr: [00:02.086608] dreamsourcelab-dslogic:
receive_transfer(): status LIBUSB_SUCCESS / LIBUSB_TRANSFER_COMPLETED
received 40960 bytes. sr: [00:02.089563] session: bus: Received
SR_DF_LOGIC packet (2000 bytes, unitsize = 2). cli: Received
SR_DF_LOGIC (2000 bytes, unitsize = 2). sr: [00:02.089601] hwdriver:
sr_config_get(): key 30000 (samplerate) sdi 0x1152620 cg NULL -> uint64
2000000 libsigrok 0.6.0-git-cdb134e Acquisition with 16/16 channels at
2 MHz 0:00000000 00000000 00000000 00000000 00000000 00000000 00000000
00000000
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