Hi! I love it. And I want one. Or two. And the HydraUSB3. Excuse me, I think I need to go and order some PCBs :-)
ECP5 is the route I was thinking to suggest to to take due to the opensource support. I don't know much more about FPGAs, it's been a long time since in dabbled in them. Cheers, Ladislav On Sun, Oct 19, 2025 at 08:14:04PM +0000, Yann Sionneau wrote: > Hi sigrok folks, > > Since we're talking about USB 3 Logic Analyzers, I take this opportunity to > say a few words about SucréLA (name is a (bad) pun based on French > pronunciation of Saleae ^^) :) > Those on the #sigrok IRC channel surely already know about it since there > have been many conversations about it already. > I am working since a few months (actually a few years!) on a USB 3.0 logic > analyzer. > > It's interesting (I hope!) because of a few points: > * USB 3.0 (5 Gbps) > * open source software (mcu fw, libsigrok driver) > * open source gateware (FPGA design) > * Reproducible with open source tools (gcc for the software, Yosys+NextPNR > for the FPGA gateware since I am using Lattice ECP5 which is one of the best > supported FPGA by the open source toolchain) > * open source hardware (all kicad files: schematics + board layout + BOM, you > can modify it and produce it yourself) > * "interesting" speeds (not just a basic toy project): 100 Msps on 16 probes, > 200 Msps on 8 probes, 400 Msps on 4 probes, and 700 Msps on 1 or 2 probes. > * FPGA design is not "from scratch/custom", I am using LiteX and litescope as > bases, which now are standards in the open FPGA world, it makes it open > source friendly because it's easy to understand and modify (modular). > * one of the most important feature I like when using an LA: "infinite" > streaming capture, not just filling an onboard "buffer". > > > 1st prototype has been made which is not fully functional (it was just a PoC > with dupont wire to connect together a HydraUSB3 and an OrangeCrab FPGA > board). > 2nd prototype where a board was made which hosts an FPGA and is a "hat" board > to plug on top of a HydraUSB3 board. > > Bringup of the 2nd prototype is done and I am working on the next board > prototype which will be a single board with both the FPGA and the USB 3 mcu > (CH569, risc-v). > > Everything is on gitlab over there: https://gitlab.com/yannsionneau/SucreLA/ > > Don't hesitate to come on the #sigrok IRC channel to have a chat about it :) > I'm still not sure about how to do some things like having dynamic input > voltage selection for instance. > > Cheers! > > Yann Sionneau > > October 15, 2025 at 12:52 PM, "Daniel Tzschentke" <[email protected] > mailto:[email protected]?to=%22Daniel%20Tzschentke%22%20%3Chi%40ese-labs.de%3E > > wrote: > > > > > > Hi Everyone, > > > > Thanks a lot for Sigrok! > > > > Recently I came across this USB3 (super speed) chip: FT601 from FTDI > > https://ftdichip.com/products/ft601q-b/ > > It's a 32 bit sync FIFO to USB3 bridge and intended for parallel camera > > interfaces. > > > > My first thought was, that it should be pretty straight forward to build a > > 32 channel 100 MHz logic analyzer with it. > > > > I was thinking of an open source/community logic analyzer made for Sigrok - > > schematic and pcb I know how to do, but I have no idea how to support the > > chip in Sigrok - would anyone be up for taking care of the Sigrok support? > > > > I could send out some PCBs to developer from the first test batch but would > > also upload all the kicad files (sch, pcb, bom, gbr, ...) to a public > > github repo, so anyone could order PCBs. > > > > What do you guys think? > > > > Best, > > Dan > > > > _______________________________________________ > > sigrok-devel mailing list > > [email protected] > > mailto:[email protected] > > https://lists.sourceforge.net/lists/listinfo/sigrok-devel > > > > > _______________________________________________ > sigrok-devel mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/sigrok-devel -- S pozdravem Ladislav "Krakonoš" Láska http://www.krakonos.org/ _______________________________________________ sigrok-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/sigrok-devel
