OK. Thank you.


Best Regards,
Jed / jintang wang



Huawei Technologies Co., Ltd. 
Email: [email protected]
No.701, Jianghui RD, Binjiang District,Hangzhou 310000, P.R.China
http://www.huawei.com 

-----Original Message-----
From: Volos Stavros [mailto:[email protected]] 
Sent: Friday, September 06, 2013 8:20 PM
To: Wangjintang; [email protected]
Subject: RE: error about run CMP.L2SharedNUCA.OoO timing model on flexus

Hi,

You need to make sure that the number of memory controllers defined in the 
user-postload.simics at the following line

flexus.set "-net-mapper:MemControllers"                         "1" # "Number 
of memory controllers" (MemControllers)

matches the memory width at the wiring.cpp at the following line (for 16-core)

FLEXUS_INSTANTIATE_COMPONENT_ARRAY( MemoryLoopback, theMemoryCfg, theMemory, 
SCALE_WITH_SYSTEM_WIDTH, DIVIDE, 16 );

Regards,
-Stavros

________________________________________
From: Wangjintang [[email protected]]
Sent: Tuesday, August 27, 2013 4:13 AM
To: [email protected]
Subject: error about run CMP.L2SharedNUCA.OoO timing model on flexus

Dear all,

After get  trace use the command "run_job -postprocess 
"/home/Flexus/flexus-4.1/scripts/postprocess_ckptgen.sh flexpoint 28 
classification" -cfg trace -run flexpoint -local -ckpt-gen CMP.L2Shared.Trace 
classification1cpu", Then I use the below command to get timing.but one error 
appear. It's some parameter wrong? Or need to modify the comopent.hpp? thanks .
56 <component.hpp:270> {15}- <undefined> Assertion failed: ((!(anIndex < 
theWidth))) : Component: memory Index: 0 Width: 0 Abort (SIGABRT) in main thread


The log as below:

linux-77xt:/home/Flexus/flexus-4.1 # date;run_job -ma -cfg timing_v9 -run 
timing -local CMP.L2SharedNUCA.OoO classification1cpu;date Wed Aug 28 00:56:08 
CST 2013 Setting up classification1cpu (0-9:5-28):  009:028
>/home/Flexus/flexus-4.1/result/classification/1cpu/timing_v9-CMP.L2Shar
>edNUCA.OoO-28Aug13-005608/classification1cpu/000_005
Image memory limited to 1 GB
Opening debug output file: debug.out
Opening debug output file: stats.out
Opening debug output file: trace.out
Successfully parsed debug configurations from debug.cfg Initializing 
Flexus::ConfigurationManager...done
Initializing Flexus::ComponentManager...done Entered init_local

Flexus (C) 2006-2010 The SimFlex Project Eric Chung, Michael Ferdman, Brian 
Gold, Nikos Hardavellas, Jangwook Kim, Ippokratis Pandis, Minglong Shao, Jared 
Smolens, Stephen Somogyi, Evangelos Vlachos, Thomas Wenisch, Roland Wunderlich 
Anastassia Ailamaki, Babak Falsafi and James C. Hoe.

Flexus Simics simulator - Built as CMP.L2SharedNUCA.OoO v1.0

1 <startup.cpp:121> {0}- Initializing Flexus.
2 <ComponentManager.cpp:79> {0}- Instantiating system with a width factor of: 1
3 <WhiteBoxImpl.cpp:416> {0}- Creating WhiteBox
4 <WhiteBoxImpl.cpp:99> {0}- symtable loaded
5 <uFetch.hpp:82> {0}- ufetch port InstructionFetchSeen is not wired
6 <uFetch.hpp:82> {0}- ufetch port ClockTickSeen is not wired
7 <v9Decoder.hpp:66> {0}- decoder port DispatchedInstructionOut is not wired
8 <uArch.hpp:121> {0}- uarch port StoreForwardingHitSeen is not wired
9 <Cache.hpp:92> {0}- L1d port FrontSideOut_I is not wired 10 <Cache.hpp:92> 
{0}- L1d port BackSideOut_Prefetch is not wired
11 <wiring.cpp:101> {0}-  initializing Parameters...
Warning: The 'flexus-CMP.L2SharedNUCA.OoO-v9-iface-gcc' module unexpectedly 
defined the 'Flexus' class
Warning: The 'flexus-CMP.L2SharedNUCA.OoO-v9-iface-gcc' module unexpectedly 
defined the 'SimicsInterface' class
WARNING: There is no parameter named "-uarch:early_sgp"
WARNING: There is no parameter named "-uarch:track_parallel"
12 <configuration.hpp:189> {0}- Bad Lexical Cast attempting to set dynamic 
parameter.
WARNING: Unable to set parameter CacheLevel to eL1
13 <configuration.hpp:189> {0}- Bad Lexical Cast attempting to set dynamic 
parameter.
WARNING: Unable to set parameter CacheLevel to eL2
14 <flexus.cpp:385> {0}- Set region interval to : 50000 [cpu0 info] Note that 
on this cpu, instruction-fetch-trace is implemented using 
instruction-cache-access-trace with a suitable cache line size.
[client_cpu1 info] Note that on this cpu, instruction-fetch-trace is 
implemented using instruction-cache-access-trace with a suitable cache line 
size.
15 <ComponentManager.cpp:94> {0}- Initalizing components...
16 <ComponentManager.cpp:98> {0}- Initalizing sys-white-box
17 <ComponentManager.cpp:98> {0}- Initalizing sys-fag
18 <mai_api.cpp:279> {0}- Searching 2 cpus.
19 <mai_api.cpp:283> {0}- Processor 0: cpu0 - CPU 0 20 <mai_api.cpp:305> {0}- 
Found CPU: '' - 0
21 <mai_api.cpp:283> {0}- Processor 1: client_cpu1 - CPU 1
22 <mai_api.cpp:305> {0}- Found CPU: 'client_' - 1
23 <mai_api.cpp:325> {0}- Found 1 Flexus CPUs and 1 Client CPUs and 0 Besim 
CPUs in 0 VMs
24 <mai_api.cpp:428> {0}- Automatic organization of equal-size VMs
25 <mai_api.cpp:435> {0}- Square topology of VMs: 1x1
26 <mai_api.cpp:439> {0}- Square VM: 1x1
27 <mai_api.cpp:467> {0}- VMS per row = 1, CPVM = 1, GridOfVM = 1*1, NumRows = 1
28 <mai_api.cpp:527> {0}- theProcMap[0] = (0, 0) (abs_index = 0)
29 <mai_api.cpp:509> {0}- Client[0] = 1
30 <mai_api.cpp:541> {0}- Finished creating Processor Mapper.
31 <FetchAddressGenerateImpl.cpp:88> {0}- sys-fag Thread[0.0] connected to cpu0 
Initial PC: v:0fc017070
32 <ComponentManager.cpp:98> {0}- Initalizing sys-ufetch
33 <ComponentManager.cpp:98> {0}- Initalizing sys-combiner
34 <ComponentManager.cpp:98> {0}- Initalizing sys-decoder
35 <ComponentManager.cpp:98> {0}- Initalizing sys-uarch
36 <microArch.cpp:238> {0}- sys-uarch microArch will drive client_cpu1 with 
fixed IPC 8
37 <microArch.cpp:202> {0}- sys-uarch connected to cpu0
38 <ComponentManager.cpp:98> {0}- Initalizing sys-L1d
39 <ComponentManager.cpp:98> {0}- Initalizing sys-L2 40 <CMPCacheImpl.cpp:91> 
{0}- GroupInterleaving = 1024
41 <NonInclusiveMESIPolicy.cpp:98> {0}- GI = 1024
42 <NonInclusiveMESIPolicy.cpp:80> {0}- GI = 1024
43 <StdArray.hpp:578> {0}- theGroupInterleaving = 1024
44 <StdArray.hpp:687> {0}- blockOffsetBits = 6, indexBits = 13, bankBits = 0, 
bankInterleavingBits = 6, groupBits = 0, groupInterleavingBits = 10, lowBits = 
0, midBits = 4, highBits = 9, setLowMask = 0, setMidMask = f, setHighMask = 
1ff0, setLowShift = 6, setMidShift = 6, setHighShift = 6, theBankMask = 0, 
theBankShift = 6, theGroupMask = 0, theGroupShift = 10
45 <AbstractCacheController.hpp:72> {0}- sys-L2: created 
AbstractCacheController 'sys-L2'
46 <ComponentManager.cpp:98> {0}- Initalizing 00-nic
47 <ComponentManager.cpp:98> {0}- Initalizing 01-nic
48 <ComponentManager.cpp:98> {0}- Initalizing 02-nic
49 <ComponentManager.cpp:98> {0}- Initalizing sys-network Attaching node 0 to 
switch 0:0 Attaching node 1 to switch 0:1 Attaching node 2 to switch 0:2
WARNING: switch 0 port 3 left unused (may be safe)
WARNING: switch 0 port 4 left unused (may be safe)
WARNING: switch 0 port 5 left unused (may be safe)
WARNING: switch 0 port 6 left unused (may be safe) 50 <ComponentManager.cpp:98> 
{0}- Initalizing sys-memory-map
51 <MemoryMapImpl.cpp:326> {0}- Page map file page_map.out was not found.
52 <ComponentManager.cpp:98> {0}- Initalizing sys-magic-break
53 <ComponentManager.cpp:98> {0}- Initalizing sys-net-mapper
54 <SplitDestinationMapperImpl.cpp:139> {0}- sys-net-mapper Creating 
SplitDestinationMapper with 1 cores, 1 directories, and 1 memory controllers.
55 <mai_api.cpp:96> {1}- CPU[1] Registering for interrupts
56 <component.hpp:270> {15}- <undefined> Assertion failed: ((!(anIndex < 
theWidth))) : Component: memory Index: 0 Width: 0 Abort (SIGABRT) in main 
thread Crash stack trace:
#0 0x00002b249d4ebb95 <unknown>
......
#102 0x00002b249dbad500 <unknown>
The simulation state has been corrupted. Simulation cannot continue.
Please restart Simics.
Cannot open stats database ../stats_db.out.gz
</home/Flexus/flexus-4.1/result/classification/1cpu/timing_v9-CMP.L2SharedNUCA.OoO-28Aug13-005608/classification1cpu/000_005
>/home/Flexus/flexus-4.1/result/classification/1cpu/timing_v9-CMP.L2Shar
>edNUCA.OoO-28Aug13-005608/classification1cpu/000_006
Image memory limited to 1 GB
Opening debug output file: debug.out
Opening debug output file: stats.out
Opening debug output file: trace.out
Successfully parsed debug configurations from debug.cfg Initializing 
Flexus::ConfigurationManager...done
Initializing Flexus::ComponentManager...done Entered init_local

Flexus (C) 2006-2010 The SimFlex Project Eric Chung, Michael Ferdman, Brian 
Gold, Nikos Hardavellas, Jangwook Kim, Ippokratis Pandis, Minglong Shao, Jared 
Smolens, Stephen Somogyi, Evangelos Vlachos, Thomas Wenisch, Roland Wunderlich 
Anastassia Ailamaki, Babak Falsafi and James C. Hoe.




Best Regards,
Jed / jintang wang

[Company_logo]

Huawei Technologies Co., Ltd.
Email: [email protected]
No.701, Jianghui RD, Binjiang District,Hangzhou 310000, P.R.China 
http://www.huawei.com

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