Hey guys,

We noticed that in a number of places in the code (specifically in 
things like FastCache, FastCMPCache) 32-bit variables are used to hold 
physical addresses. As a specific example, when doing a cache lookup, 
the "tagset" variable is an unsigned long.

Is this just a way of reducing the simulator's memory footprint? Are you 
guys using 64-bit machines where unsigned long is 64-bits?

We're mostly just curious. This shouldn't cause any problems that we can 
foresee unless we start simulating a larger physical memory.


Thanks,

Jason
From twenisch at ece.cmu.edu  Mon Apr 16 17:51:13 2007
From: twenisch at ece.cmu.edu (Thomas Wenisch)
List-Post: [email protected]
Date: Mon Apr 16 17:51:17 2007
Subject: [Simflex] Physical Address size
In-Reply-To: <[email protected]>
References: <[email protected]>
Message-ID: <[email protected]>

Hi,

The physical address on all the SPARC machines that we have modelled in 
Simics is narrow enough to fit in 32-bits (virtual addresses do not, of 
course).  I suspect that the real answer to why the code is written this 
way is "laziness", but we will claim "performance" if you let us get away 
with it.

Regards,
-Tom Wenisch

On Mon, 16 Apr 2007, Jason Zebchuk wrote:

> Hey guys,
>
> We noticed that in a number of places in the code (specifically in things 
> like FastCache, FastCMPCache) 32-bit variables are used to hold physical 
> addresses. As a specific example, when doing a cache lookup, the "tagset" 
> variable is an unsigned long.
>
> Is this just a way of reducing the simulator's memory footprint? Are you guys 
> using 64-bit machines where unsigned long is 64-bits?
>
> We're mostly just curious. This shouldn't cause any problems that we can 
> foresee unless we start simulating a larger physical memory.
>
>
> Thanks,
>
> Jason
> _______________________________________________
> SimFlex mailing list
> [email protected]
> https://sos.ece.cmu.edu/mailman/listinfo/simflex
> SimFlex web page: http://www.ece.cmu.edu/~simflex
>
From zebchuk at eecg.toronto.edu  Mon Apr 16 18:59:04 2007
From: zebchuk at eecg.toronto.edu (Jason Zebchuk)
List-Post: [email protected]
Date: Mon Apr 16 18:59:15 2007
Subject: [Simflex] Use of theEvictable in Cache or CmpCache
Message-ID: <[email protected]>

Hey guys,

I'm looking at the Cache and CmpCache modules.

Before actually scheduling an eviction from an evict buffer, the code 
checks to make sure that the entry is marked as "evictable".

I've checked through the code, and it seems that there is no way for 
this condition to ever be false. I guess there's nothing wrong with 
this, except there's one place in PiranhaCacheControllerImpl.cpp that 
goes out of the way to call setEvictable().


Am I missing anything here? Is the evictable property really just never 
used?


On a related note, I'm thinking of actually making use of this property 
to delay some evictions. If you think of the way things are modeled 
right now, a block will be moved to the eviction buffer before the 
process that caused the eviction enters the tag or data pipelines. In 
practice, it shouldn't be possible to actually evict the block until the 
corresponding tag and data accesses take place, but there's nothing in 
place to prevent that. If I understand the code correctly, right now, an 
eviction message can be sent to memory before the evicted block is 
actually read from the data array. In most cases this is probably 
unlikely to happen, and thus it may not be important to model it 
correctly. However, in situations like a SectorCache, there may be 
bursts of evictions, and this may be more of a problem.

Do you guys agree with my interpretation of the code? Do you foresee any 
major problems (ie. deadlocks) if I use the evictable property of 
entries in the evict buffer to delay the actual sending of evict 
messages until after the process exits the tag and data pipeline?


Thanks,

Jason
From leaderduan at gmail.com  Mon Apr 23 21:55:52 2007
From: leaderduan at gmail.com (Lide Duan)
List-Post: [email protected]
Date: Mon Apr 23 21:56:00 2007
Subject: [Simflex] Need some help on private L2 caches design
Message-ID: <[email protected]>

Hi all,

    Currently I am developing a simulator for a 2-level CMP cache design
which has private L1 and private L2 caches for each processor. The layout of
this design is very similar to the existing TraceFlex simulator, but I
intend to implement a "timing" simulator. So I used Cache and IDCacheMux
components to construct the two cache levels, and created a new component
(SMPBus) as the external shared bus connected to all the private L2 caches
to maintain the coherence among them. Actually the functions of this new
component are similar to FastBus.

    1. Basically, what I have done in the SMPBus: For each cycle, I
collected all the request and snoop messages comming from the above L2
caches. For each request, if the requested cache block is not in the
directory, this request is directly sent to the below memory, and a reply
will be back after some delay. Otherwise, if it's already in the directory,
some downgrade or invalidate messages will be sent to the owner or sharers,
according to the read or write operation.
    However, for snoop messages, what should I do? I did receive some snoop
messages (e.g. InvalidateAck) from the L2, but I don't know how to deal with
them.

    2. I noticed that there is a command "flexus.print-measurement" which
can be used to print the measure results. How can I get the results to the
all.measurement.out file?

    3. I was trying to load TraceFlex first to warm up the cache (much
faster than other simulators), and then load my simulator. But seems that
SimFlex cannot support two simulators in this way, how can I do?

    Any suggestion would be helpful!
Thanks,
Lide
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From leaderduan at gmail.com  Sun Apr 29 18:44:24 2007
From: leaderduan at gmail.com (Lide Duan)
List-Post: [email protected]
Date: Sun Apr 29 18:44:30 2007
Subject: [Simflex] How to measure different workloads based on the
        experiment?
Message-ID: <[email protected]>

Hi there,

I followed the steps of the experiment introduced in the getting started
guide, and successfully observed the measurement results. This experiment is
for some test application, but if I want to measure other workloads, how can
I do? For example, I have created a bunch of simics checkpoints and want to
measure them each of which contains several files. What modifications should
I make to the prepare-test-app script? Do I need to modify other scripts?

Actually I just want to measure different workloads using different
simulators. I tried to use TraceFlex to warm up the cache, and load some
other simulator to do the detail simulation, but it failed. Seems that
Flexus cannot switch between different modules during simulation. Then how
can I do? I found that the experiment in the getting started guide is a good
template to do the simulation and process the results, so I was trying to
modify the scripts to measure different checkpoints.

Sincerely,
Lide
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