Hi,
 I have a few more queries. In the results I am getting a section of
Nodes-HE-xxxxx and Nodes-RE-xxxxx. I would like to know what this HE and
RE means as I can see two files in the DSMFlex.OoO namely he.rom and
re.rom after running make DSMFlex.OoO.
 Also in the results section I am getting,
   sys-cycles      250000
   sys-network-NetworkLatency   VC[0]
     Count     Pct      Value
      1791       38.50% 108
      1398       30.05% 210
      486        10.45% 312
      33          0.71% 110
      26          0.56% 111
      25          0.54% 212
      22          0.47% 211
      21          0.45% 213
      21          0.45% 214
      20          0.43% 216
      19          0.41% 215
      18          0.39% 112
      17          0.37% 109
      15          0.32% 113
      15          0.32% 231
      14          0.30% 114
      14          0.30% 313
      11          0.24% 228
      11          0.24% 134
      11          0.24% 224
      10          0.21% 232
      9           0.19% 218
      9           0.19% 117
      9           0.19% 315
      8           0.17% 121
      8           0.17% 219
      8           0.17% 129
      8           0.17% 230
      8           0.17% 243
      8           0.17% 314
      7           0.15% 220
      7           0.15% 236
      7           0.15% 223
      7           0.15% 244
      7           0.15% 130
      7           0.15% 242
      7           0.15% 318
      6           0.13% 123
      6           0.13% 125
      6           0.13% 317
      6           0.13% 272
      6           0.13% 275
      6           0.13% 239
      6           0.13% 149
      5           0.11% 316
      5           0.11% 221
      5           0.11% 119
      5           0.11% 217
      5           0.11% 332
      5           0.11% 330
      5           0.11% 249
      5           0.11% 227
      5           0.11% 362
      5           0.11% 190
      5           0.11% 326
      5           0.11% 234
      5           0.11% 240
      5           0.11% 245
      5           0.11% 158
      5           0.11% 340
      5           0.11% 342
      5           0.11% 238
      5           0.11% 137
      4           0.09% 333
      4           0.09% 225
      4           0.09% 116
      4           0.09% 118
      4           0.09% 159
      4           0.09% 392
      4           0.09% 124
      4           0.09% 329
      4           0.09% 328
      4           0.09% 226
      4           0.09% 168
      4           0.09% 237
      4           0.09% 254
      4           0.09% 128
      4           0.09% 229
      4           0.09% 347
      4           0.09% 322
      4           0.09% 139
      4           0.09% 368
      4           0.09% 138
      4           0.09% 135
      4           0.09% 247
      3           0.06% 351
      3           0.06% 335
      3           0.06% 325
      3           0.06% 320
      3           0.06% 338
      3           0.06% 296
      3           0.06% 294
      3           0.06% 277
      3           0.06% 447
      3           0.06% 344
      3           0.06% 269
      3           0.06% 268
      3           0.06% 345
      3           0.06% 263
      3           0.06% 262
      3           0.06% 261
      3           0.06% 259
      3           0.06% 258
      3           0.06% 529
      3           0.06% 250
      3           0.06% 248
      3           0.06% 147
      3           0.06% 173
      3           0.06% 142
      3           0.06% 141
      3           0.06% 136
      3           0.06% 378
      3           0.06% 406
      3           0.06% 363
      3           0.06% 120
      3           0.06% 354
      3           0.06% 233
      3           0.06% 235
      3           0.06% 241
      2           0.04% 339
      2           0.04% 161
      2           0.04% 293
      2           0.04% 156
      2           0.04% 302
      2           0.04% 341
      2           0.04% 309
      2           0.04% 409
      2           0.04% 389
      2           0.04% 145
      2           0.04% 407
      2           0.04% 319
      2           0.04% 323
      2           0.04% 132
      2           0.04% 131
      2           0.04% 395
      2           0.04% 122
      2           0.04% 331
      2           0.04% 334
      2           0.04% 365
      2           0.04% 348
      2           0.04% 426
      2           0.04% 369
      2           0.04% 255
      2           0.04% 420
      2           0.04% 266
      2           0.04% 252
      2           0.04% 490
      2           0.04% 174
      2           0.04% 488
      2           0.04% 375
      2           0.04% 170
      2           0.04% 353
      2           0.04% 418
      2           0.04% 276
      2           0.04% 650
      2           0.04% 283
      129         2.77% in 129 undisplayed elements
      --------- ------- ----------
      4652      100.00% 285 elements
     Average value: 183.30
 Similarly I am getting some data for sys-network-NetworkLatency VC[1] and
   sys-network-NetworkLatency VC[2]. The total count of VC[0] , VC[1] and
VC{2] equals to the number of messages received. From this data how will
I know the total network latency. Also is this network latecny inculsive
of the sys-cycles. I mean for sys-cycles = 250000 and say 'X' cycles of
network latency (I don't know how to arrive at 'X' from the obtained
data) computational latency is 250000 and network latency is 'X' or
computational latency is 250000-X.

Abu Saad

>
> Hi,
>
> See responses inline...
>
> Excerpts From "Abu Saad Papa" <[email protected]>:
>  [Simflex] Network Topologies in DSM: "Abu Saad Papa" <abu_s...@research.
>>Hi,
>> As part of my research work, I would like to compare the latency of the
>>interconnection network (connecting the various on-chip cores) and
>>computational latency of each core. I am assuming a CMP with on-chip
>>interconnection network. The number of cores on the chip is varying from
>>2 to the max allowed in Flexus. I have a few clarifications to make
>>
>>1) Can I use DSMFlex.OoO for the above work i.e a CMP with on-chip
>>interconnection network?
>
> Yes, this is possible if you scale the on-chip and off-chip memory
> latencies appropriately.  It's also relatively easy to integrate the
> network simulator into the CMP model (this is preferable).
> CacheController::doNewRequests() is probably the best place to add it
> there.
>
>>2) I tried DSMFlex.OoO with test application given in the starting guide
>>with 8-cores and obtained some statistics. I would like to know how to
>>calculate the network latency from the obtained results? ( are the
>>latencies given in number of cycles). Anyway I have attached the results
>> I
>>obtained at the end of this mail for clarity.
>
> The latencies are in processor core cycles.  You can change the network
> latencies in the topology file.
>
>>3) What other topologies I can use other than torus (the file I see in
>>DSMFlex.OoO folder)? What is the procedure to use a topology say a mesh
>> or
>>any other topology other than torus?
>
> There is a utility for generating these topology files in
> components/NetShim/testing/
>
> Run 'make' from within that directory.  The historically-named 'torus'
> program generates topology files, both mesh and torus varieties.
> Something
> along the lines of this should generate a 4x4 mesh:
>
>    ./torus 16 -m -d mesh16.txt
>
> Using -t instead of -m will generate the familiar 2D torus.
>
>>4) What is the max no of cores I can use in DSMFlex.OoO?
>
> 16 cores has been verified for both the DSM and CMP simulators.  Up to 32
> cores should also work in the CMP, but (to the best of my knowledge) this
> has not been tested.
>
> - Jared
>
>> Thanks in Advance.
>>


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