Many of us were discussing the specs for use with a new signal generation approach and so the Huff & Puff VFO Stabilizer was discussed. After some study of the idea from the pros involved in designing H&P circuits there were some things discovered that my encourage you.
Herein VFO is the same as VCO in application! Since you can build the VCO or use an external VFO as the device controlled by the H&P. If these specs below can be reliably replicated then it blows away the DDS methods in technical purity specifications. Phase Noise Bandwidth: Since the H&P uses edge comparison rather than phase comparison, the H&P can make small step adjustments in VCO control and hence with steps as little as 10 Hz in some technical designs the resultant phase noise is much less likewise due to these smaller steps (than can be accomplished with PLL phase comparison.) Such small steps are small enough to not interfere with any digital communications software stability criteria. (See email listed at end here for more on edge locked comparison. Amazingly a 1 Hz step control is typical.) BLL: Or Bit Locked Loop, this is a VCO control loop made up of a 64 to 128 bit Shift Register IC that follows the "edge comparitor" which slows down the correction response and makes it possible to have very small VCO voltage correction steps in Hz terms. This does not have to be used in H&P designs but is used in the Slow Tune Fast Stabilizer designs for such technical control of the VFO section. Frequency Counters as a VCO Loop Control: We finally come up with ideas on how to use the frequency counter to actually control a VFO. This can be added into an already existing H&P control scheme for added control that can be switched on if desired. Read the following from David. "In his book "Build your own Intelligent Amateur Radio Transceiver" McGraw-Hill 1997 pp 139-141 Randy Henderson describes an interesting method which doesn't sound too far away from what you have in mind. Basically what he does is to sample the least significant digit of a counter. This he achieves by looking at the b and g segments of the 4511 led driver (these are evenly distributed between the 10 digits). If they're both on, the input to an op-amp integrator goes high and shifts the VFO frequency accordingly. If not the frequency is shifted in the other direction. Sounds too simple to be true - but I haven't tried it!" David (of HuffPuffVFO Group Yahoo) David is referring to a VCO control voltage to a varicap diode derived from the mention Op Amp. Temperature Stability: It is advised to use Amidon Mix #3 cores for ferrite temp stability in coils for the HF VFO. Or use no ferrite at all in the windings: i.e. air-wound. All VFO related resistors should be metal film, low noise with high temp stability. The line up now has a temperature compensation network and now in addition it has a VFO Oven section that uses a few thermistors to a circuit that controls a bank of high wattage resistors that constantly heat the VFO Oven (cabinet) such as we have in temperature controlled crystal oscillators (TXCO's). We would ordinarily think of using NPO temp compensated capacitors but these are getting harder to find these days. So polystyrene temp stable capacitors are recommended for all VFO fixed capacitor requirements. Summary: We now have a VFO that fits the long debated technical specifications for SDR that were so hotly discussed and debated in the various SDR groups. Certainly some tweaking of things will have to be done by those of us now becoming involved in the hands on study of these circuits. I myself am now going on into building H&P circuits and the study of the numerous circuit ideas for quadrature detection along with my favorite idea for use of dual gate mosfets as the mixer/detector. Fortunately low cost 7400 Series Linear Integrated IC's seem to be able to do all of the things required for both SDR and H&P applications. 100 such IC's are available at Jameco for $6.95, and thats a way to get started if you also get yourself a small circuit breadboard. Remember that in the 7400 Series we have such IC's as the 74HC4060 which has a CMOS Oscillator followed by a CMOS Osc Buffer section to isolate the VFO and reduce jitter related to improper loading effects. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * Below is the email form Arv K7HKL regarding edge locked comparison. "In a true H&P design the reference clock is what is compared with specific cycles of the VFO with the result being a correction pulse inserted into the VFO or VCO control loop. If the edge of the VFO signal leads the edge of the reference the corrective pulse will tend to lower the VFO frequency. If the edge of the VFO signal lags the reference the corrective pulse will tend to raise the VFO frequency. Not every VFO cycle is compared with the H&P reference clock, only those that are closest to matching the edge of the reference clock are compared (I know, it is sometimes a little confusing until you get the idea behind this!). Just remember that H&P technique is not PLL technique. They are actually quite different and share only the general layout of a voltage controlled oscillator. Where PLL loop timing is small, H&P loop timing is usually very very large. H&P sort of sneaks up on the desired lock frequency, where PLL circuits try to lock very quickly. Use of the 74HC4060 in the simpler H&P circuit (not the FAST H&P Design) is as a crystal oscillator (see the 74HC4060 data sheet for the layout) followed by the binary dividers inside that chip. Selecting the proper output from that binary chain is what controls the step size (i.e. 32 Hz will result in 32 Hz tuning steps). The amount and rate of unstabilized drift in your oscillator may limit how small the H&P steps can be. The circuit must be able to overcome this drift without allowing it to change the tuning step that you have selected. _NOTE:_ If you are using a watch crystal for your H&P reference oscillator, be careful to limit the drive to the crystal. The design for HF crystals that uses 22K in series with the crystal will severely overdrive your watch crystal. A series value of 300K is better suited, as is 10 Meg for the linearizing resistor used with 74HCxx gates. Look here: <http://www.hanssummers.com/radio/huffpuff/minimalist/1chip/index.htm> for a suitable watch crystal oscillator layout. When your H&P stabilizer is operating properly you should be able to see on a scope that the control loop is oscillating up and down slightly while the frequency is holding within 1 Hz or so of the selected tuning step. Since it is almost impossible that your VFO edge will exactly match the edge of your H&P reference signal for any length of time, there will always be some slow 'hunting' of the signal around the selected tuning step, but this should be slow (remember the very long time constant of the H&P control loop), and should hold within 1 Hz or so. You mentioned using choke inductors as VFO frequency controlling components. That may need some further evaluation, as most chokes are designed for high inductance rather than for stability of the ferrite material with respect to temperature changes. They may work, but if you experience frequency instability, then you might want to change to an air-wound or quality toroidal ferrite cored inductor. Hope this helps. Arv - K7HKL" 73's from Dan ka9rza http://bojangles984.pbwiki.com/ _____________________________________________________________________ PrivatePhone - FREE telephone number & voicemail. A number so private, you can make it public. http://www.privatephone.com ------------------------ Yahoo! Groups Sponsor --------------------~--> Yahoo! Groups gets a make over. See the new email design. http://us.click.yahoo.com/XISQkA/lOaOAA/yQLSAA/ELTolB/TM --------------------------------------------------------------------~-> Yahoo! Groups Links <*> To visit your group on the web, go to: http://groups.yahoo.com/group/soft_radio/ <*> To unsubscribe from this group, send an email to: [EMAIL PROTECTED] <*> Your use of Yahoo! Groups is subject to: http://docs.yahoo.com/info/terms/
