Module Name: src
Committed By: snj
Date: Sat Feb 27 18:25:25 UTC 2010
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_fixup.c
Log Message:
Fix a couple typos in comments.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/mips/mips_fixup.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/mips_fixup.c
diff -u src/sys/arch/mips/mips/mips_fixup.c:1.1.2.1 src/sys/arch/mips/mips/mips_fixup.c:1.1.2.2
--- src/sys/arch/mips/mips/mips_fixup.c:1.1.2.1 Sat Feb 27 07:58:52 2010
+++ src/sys/arch/mips/mips/mips_fixup.c Sat Feb 27 18:25:25 2010
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mips_fixup.c,v 1.1.2.1 2010/02/27 07:58:52 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_fixup.c,v 1.1.2.2 2010/02/27 18:25:25 snj Exp $");
#include <sys/param.h>
@@ -136,7 +136,7 @@
KASSERT(load_addr < (intptr_t)(ci + 1));
/*
- * Use the load instrution as a prototype and it make use $0
+ * Use the load instruction as a prototype and it make use $0
* as base and the new negative offset. The second instruction
* is a NOP.
*/
@@ -152,7 +152,7 @@
(new_insns[0] >> 21) & 31);
#endif
/*
- * Contruct the TLB_LO entry needed to map cpu_info_store.
+ * Construct the TLB_LO entry needed to map cpu_info_store.
*/
const uint32_t tlb_lo = MIPS3_PG_G|MIPS3_PG_V|MIPS3_PG_D
| mips3_paddr_to_tlbpfn(MIPS_KSEG0_TO_PHYS(trunc_page(load_addr)));
