Module Name: src
Committed By: rin
Date: Mon Aug 30 00:04:31 UTC 2021
Modified Files:
src/sys/arch/arm/marvell: armadaxp.c dove.c kirkwood.c mv78xx0.c
mvsoc.c mvsoc_space.c mvsocvar.h orion.c
src/sys/arch/evbarm/marvell: marvell_machdep.c
Log Message:
Add ARMEB support to {evb,}arm/marvell.
Combined with upcoming commit to dev/marvell, all peripheral devices
seem to work just fine for KUROBOX_PRO in big-endian mode.
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/marvell/armadaxp.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/marvell/dove.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/marvell/kirkwood.c \
src/sys/arch/arm/marvell/mvsoc_space.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/marvell/mv78xx0.c
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/marvell/mvsoc.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/marvell/mvsocvar.h
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/marvell/orion.c
cvs rdiff -u -r1.36 -r1.37 src/sys/arch/evbarm/marvell/marvell_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/marvell/armadaxp.c
diff -u src/sys/arch/arm/marvell/armadaxp.c:1.23 src/sys/arch/arm/marvell/armadaxp.c:1.24
--- src/sys/arch/arm/marvell/armadaxp.c:1.23 Fri Oct 30 18:54:36 2020
+++ src/sys/arch/arm/marvell/armadaxp.c Mon Aug 30 00:04:30 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: armadaxp.c,v 1.23 2020/10/30 18:54:36 skrll Exp $ */
+/* $NetBSD: armadaxp.c,v 1.24 2021/08/30 00:04:30 rin Exp $ */
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
@@ -37,7 +37,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBI
*******************************************************************************/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: armadaxp.c,v 1.23 2020/10/30 18:54:36 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: armadaxp.c,v 1.24 2021/08/30 00:04:30 rin Exp $");
#define _INTR_PRIVATE
@@ -86,7 +86,7 @@ bus_space_handle_t mpic_cpu_handle;
static bus_space_handle_t mpic_handle, l2_handle;
int l2cache_state = 0;
int iocc_state = 0;
-#define read_miscreg(r) (*(volatile uint32_t *)(misc_base + (r)))
+#define read_miscreg(r) le32toh(*(volatile uint32_t *)(misc_base + (r)))
vaddr_t misc_base;
vaddr_t armadaxp_l2_barrier_reg;
Index: src/sys/arch/arm/marvell/dove.c
diff -u src/sys/arch/arm/marvell/dove.c:1.1 src/sys/arch/arm/marvell/dove.c:1.2
--- src/sys/arch/arm/marvell/dove.c:1.1 Sat Jan 7 16:19:28 2017
+++ src/sys/arch/arm/marvell/dove.c Mon Aug 30 00:04:30 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: dove.c,v 1.1 2017/01/07 16:19:28 kiyohara Exp $ */
+/* $NetBSD: dove.c,v 1.2 2021/08/30 00:04:30 rin Exp $ */
/*
* Copyright (c) 2016 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: dove.c,v 1.1 2017/01/07 16:19:28 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dove.c,v 1.2 2021/08/30 00:04:30 rin Exp $");
#define _INTR_PRIVATE
@@ -61,7 +61,7 @@ __KERNEL_RCSID(0, "$NetBSD: dove.c,v 1.1
bus_space_write_4((sc)->sc_iot, (sc)->sc_pmch, (o), (v))
#else
vaddr_t pmu_base = -1;
-#define READ_PMUREG(sc, o) (*(volatile uint32_t *)(pmu_base + (o)))
+#define READ_PMUREG(sc, o) le32toh(*(volatile uint32_t *)(pmu_base + (o)))
#endif
static void dove_intr_init(void);
@@ -279,8 +279,8 @@ dove_getclks(bus_addr_t iobase)
#define MHz * 1000 * 1000
- val = *(volatile uint32_t *)(iobase + DOVE_MISC_BASE +
- DOVE_MISC_SAMPLE_AT_RESET0);
+ val = le32toh(*(volatile uint32_t *)(iobase + DOVE_MISC_BASE +
+ DOVE_MISC_SAMPLE_AT_RESET0));
switch (val & 0x01800000) {
case 0x00000000: mvTclk = 166 MHz; break;
Index: src/sys/arch/arm/marvell/kirkwood.c
diff -u src/sys/arch/arm/marvell/kirkwood.c:1.10 src/sys/arch/arm/marvell/kirkwood.c:1.11
--- src/sys/arch/arm/marvell/kirkwood.c:1.10 Sat Jan 7 16:19:28 2017
+++ src/sys/arch/arm/marvell/kirkwood.c Mon Aug 30 00:04:30 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: kirkwood.c,v 1.10 2017/01/07 16:19:28 kiyohara Exp $ */
+/* $NetBSD: kirkwood.c,v 1.11 2021/08/30 00:04:30 rin Exp $ */
/*
* Copyright (c) 2010 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: kirkwood.c,v 1.10 2017/01/07 16:19:28 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: kirkwood.c,v 1.11 2021/08/30 00:04:30 rin Exp $");
#define _INTR_PRIVATE
@@ -244,8 +244,8 @@ kirkwood_getclks(vaddr_t iobase)
else /* 166MHz */
mvTclk = 166666667;
- reg = *(volatile uint32_t *)(iobase + KIRKWOOD_MPP_BASE +
- KIRKWOOD_MPP_SAMPLE_AT_RESET);
+ reg = le32toh(*(volatile uint32_t *)(iobase + KIRKWOOD_MPP_BASE +
+ KIRKWOOD_MPP_SAMPLE_AT_RESET));
if (model == MARVELL_KIRKWOOD_88F6180) {
switch (reg & 0x0000001c) {
case 0x00000014: mvPclk = 600 MHz; break;
Index: src/sys/arch/arm/marvell/mvsoc_space.c
diff -u src/sys/arch/arm/marvell/mvsoc_space.c:1.10 src/sys/arch/arm/marvell/mvsoc_space.c:1.11
--- src/sys/arch/arm/marvell/mvsoc_space.c:1.10 Fri Mar 16 17:56:32 2018
+++ src/sys/arch/arm/marvell/mvsoc_space.c Mon Aug 30 00:04:30 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsoc_space.c,v 1.10 2018/03/16 17:56:32 ryo Exp $ */
+/* $NetBSD: mvsoc_space.c,v 1.11 2021/08/30 00:04:30 rin Exp $ */
/*
* Copyright (c) 2007 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc_space.c,v 1.10 2018/03/16 17:56:32 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc_space.c,v 1.11 2021/08/30 00:04:30 rin Exp $");
#include "opt_mvsoc.h"
#include "mvpex.h"
@@ -42,6 +42,11 @@ __KERNEL_RCSID(0, "$NetBSD: mvsoc_space.
#include <arm/marvell/mvsocreg.h>
#include <arm/marvell/mvsocvar.h>
+#ifdef __ARMEB__
+#define NSWAP(n) n ## _swap
+#else
+#define NSWAP(n) n
+#endif
/* Proto types for all the bus_space structure functions */
bs_protos(mvsoc);
@@ -52,75 +57,75 @@ bs_protos(bs_notimpl);
#define MVSOC_BUS_SPACE_NORMAL_FUNCS \
/* read (single) */ \
.bs_r_1 = generic_bs_r_1, \
- .bs_r_2 = generic_armv4_bs_r_2, \
- .bs_r_4 = generic_bs_r_4, \
+ .bs_r_2 = NSWAP(generic_armv4_bs_r_2), \
+ .bs_r_4 = NSWAP(generic_bs_r_4), \
.bs_r_8 = bs_notimpl_bs_r_8, \
\
/* read multiple */ \
.bs_rm_1 = generic_bs_rm_1, \
- .bs_rm_2 = generic_armv4_bs_rm_2, \
- .bs_rm_4 = generic_bs_rm_4, \
+ .bs_rm_2 = NSWAP(generic_armv4_bs_rm_2),\
+ .bs_rm_4 = NSWAP(generic_bs_rm_4), \
.bs_rm_8 = bs_notimpl_bs_rm_8, \
\
/* read region */ \
.bs_rr_1 = generic_bs_rr_1, \
- .bs_rr_2 = generic_armv4_bs_rr_2, \
- .bs_rr_4 = generic_bs_rr_4, \
+ .bs_rr_2 = NSWAP(generic_armv4_bs_rr_2),\
+ .bs_rr_4 = NSWAP(generic_bs_rr_4), \
.bs_rr_8 = bs_notimpl_bs_rr_8, \
\
/* write (single) */ \
.bs_w_1 = generic_bs_w_1, \
- .bs_w_2 = generic_armv4_bs_w_2, \
- .bs_w_4 = generic_bs_w_4, \
+ .bs_w_2 = NSWAP(generic_armv4_bs_w_2), \
+ .bs_w_4 = NSWAP(generic_bs_w_4), \
.bs_w_8 = bs_notimpl_bs_w_8, \
\
/* write multiple */ \
.bs_wm_1 = generic_bs_wm_1, \
- .bs_wm_2 = generic_armv4_bs_wm_2, \
- .bs_wm_4 = generic_bs_wm_4, \
+ .bs_wm_2 = NSWAP(generic_armv4_bs_wm_2),\
+ .bs_wm_4 = NSWAP(generic_bs_wm_4), \
.bs_wm_8 = bs_notimpl_bs_wm_8, \
\
/* write region */ \
.bs_wr_1 = generic_bs_wr_1, \
- .bs_wr_2 = generic_armv4_bs_wr_2, \
- .bs_wr_4 = generic_bs_wr_4, \
+ .bs_wr_2 = NSWAP(generic_armv4_bs_wr_2),\
+ .bs_wr_4 = NSWAP(generic_bs_wr_4), \
.bs_wr_8 = bs_notimpl_bs_wr_8
#define MVSOC_BUS_SPACE_STREAM_FUNCS \
/* read stream (single) */ \
.bs_r_1_s = generic_bs_r_1, \
- .bs_r_2_s = generic_armv4_bs_r_2, \
- .bs_r_4_s = generic_bs_r_4, \
+ .bs_r_2_s = NSWAP(generic_armv4_bs_r_2),\
+ .bs_r_4_s = NSWAP(generic_bs_r_4), \
.bs_r_8_s = bs_notimpl_bs_r_8, \
\
/* read multiple stream */ \
.bs_rm_1_s = generic_bs_rm_1, \
- .bs_rm_2_s = generic_armv4_bs_rm_2, \
- .bs_rm_4_s = generic_bs_rm_4, \
+ .bs_rm_2_s = NSWAP(generic_armv4_bs_rm_2),\
+ .bs_rm_4_s = NSWAP(generic_bs_rm_4), \
.bs_rm_8_s = bs_notimpl_bs_rm_8, \
\
/* read region stream */ \
.bs_rr_1_s = generic_bs_rr_1, \
- .bs_rr_2_s = generic_armv4_bs_rr_2, \
- .bs_rr_4_s = generic_bs_rr_4, \
+ .bs_rr_2_s = NSWAP(generic_armv4_bs_rr_2),\
+ .bs_rr_4_s = NSWAP(generic_bs_rr_4), \
.bs_rr_8_s = bs_notimpl_bs_rr_8, \
\
/* write stream (single) */ \
.bs_w_1_s = generic_bs_w_1, \
- .bs_w_2_s = generic_armv4_bs_w_2, \
- .bs_w_4_s = generic_bs_w_4, \
+ .bs_w_2_s = NSWAP(generic_armv4_bs_w_2),\
+ .bs_w_4_s = NSWAP(generic_bs_w_4, \
.bs_w_8_s = bs_notimpl_bs_w_8, \
\
/* write multiple stream */ \
.bs_wm_1_s = generic_bs_wm_1, \
- .bs_wm_2_s = generic_armv4_bs_wm_2, \
- .bs_wm_4_s = generic_bs_wm_4, \
+ .bs_wm_2_s = NSWAP(generic_armv4_bs_wm_2),\
+ .bs_wm_4_s = NSWAP(generic_bs_wm_4), \
.bs_wm_8_s = bs_notimpl_bs_wm_8, \
\
/* write region stream */ \
.bs_wr_1_s = generic_bs_wr_1, \
- .bs_wr_2_s = generic_armv4_bs_wr_2, \
- .bs_wr_4_s = generic_bs_wr_4, \
+ .bs_wr_2_s = NSWAP(generic_armv4_bs_wr_2),\
+ .bs_wr_4_s = NSWAP(generic_bs_wr_4), \
.bs_wr_8_s = bs_notimpl_bs_wr_8
#define MVSOC_BUS_SPACE_DEFAULT_FUNCS \
@@ -130,7 +135,7 @@ bs_protos(bs_notimpl);
.bs_subregion = mvsoc_bs_subregion, \
\
/* allocation/deallocation */ \
- .bs_alloc =mvsoc_bs_alloc, \
+ .bs_alloc = mvsoc_bs_alloc, \
.bs_free = mvsoc_bs_free, \
\
/* get kernel virtual address */ \
@@ -152,8 +157,8 @@ bs_protos(bs_notimpl);
\
/* set region */ \
.bs_sr_1 = bs_notimpl_bs_sr_1, \
- .bs_sr_2 = generic_armv4_bs_sr_2, \
- .bs_sr_4 = generic_bs_sr_4, \
+ .bs_sr_2 = NSWAP(generic_armv4_bs_sr_2),\
+ .bs_sr_4 = NSWAP(generic_bs_sr_4), \
.bs_sr_8 = bs_notimpl_bs_sr_8, \
\
/* copy */ \
Index: src/sys/arch/arm/marvell/mv78xx0.c
diff -u src/sys/arch/arm/marvell/mv78xx0.c:1.2 src/sys/arch/arm/marvell/mv78xx0.c:1.3
--- src/sys/arch/arm/marvell/mv78xx0.c:1.2 Sat Jan 7 16:19:28 2017
+++ src/sys/arch/arm/marvell/mv78xx0.c Mon Aug 30 00:04:30 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: mv78xx0.c,v 1.2 2017/01/07 16:19:28 kiyohara Exp $ */
+/* $NetBSD: mv78xx0.c,v 1.3 2021/08/30 00:04:30 rin Exp $ */
/*
* Copyright (c) 2010 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mv78xx0.c,v 1.2 2017/01/07 16:19:28 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mv78xx0.c,v 1.3 2021/08/30 00:04:30 rin Exp $");
#define _INTR_PRIVATE
@@ -214,14 +214,16 @@ mv78xx0_getclks(vaddr_t iobase)
#define MHz * 1000 * 1000
- reg = *(volatile uint32_t *)(iobase + MV78XX0_SAMPLE_AT_RESET_HIGH);
+ reg = le32toh(*(volatile uint32_t *)(iobase +
+ MV78XX0_SAMPLE_AT_RESET_HIGH));
switch (reg & 0x180) {
case 0x000: mvTclk = 166666667; break;
case 0x080: mvTclk = 200 MHz; break;
default: mvTclk = 200 MHz; break;
}
- reg = *(volatile uint32_t *)(iobase + MV78XX0_SAMPLE_AT_RESET_LOW);
+ reg = le32toh(*(volatile uint32_t *)(iobase +
+ MV78XX0_SAMPLE_AT_RESET_LOW));
switch (reg & 0x0e0) {
case 0x020: mvSysclk = 200 MHz; break;
Index: src/sys/arch/arm/marvell/mvsoc.c
diff -u src/sys/arch/arm/marvell/mvsoc.c:1.31 src/sys/arch/arm/marvell/mvsoc.c:1.32
--- src/sys/arch/arm/marvell/mvsoc.c:1.31 Sat Aug 7 16:18:44 2021
+++ src/sys/arch/arm/marvell/mvsoc.c Mon Aug 30 00:04:30 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsoc.c,v 1.31 2021/08/07 16:18:44 thorpej Exp $ */
+/* $NetBSD: mvsoc.c,v 1.32 2021/08/30 00:04:30 rin Exp $ */
/*
* Copyright (c) 2007, 2008, 2013, 2014, 2016 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.31 2021/08/07 16:18:44 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.32 2021/08/30 00:04:30 rin Exp $");
#include "opt_cputypes.h"
#include "opt_mvsoc.h"
@@ -92,13 +92,13 @@ static vaddr_t com_base;
static inline uint32_t
uart_read(bus_size_t o)
{
- return *(volatile uint32_t *)(com_base + (o << 2));
+ return le32toh(*(volatile uint32_t *)(com_base + (o << 2)));
}
static inline void
uart_write(bus_size_t o, uint32_t v)
{
- *(volatile uint32_t *)(com_base + (o << 2)) = v;
+ *(volatile uint32_t *)(com_base + (o << 2)) = htole32(v);
}
static int
@@ -1195,21 +1195,21 @@ mvsoc_model(void)
KASSERT(regbase != 0xffffffff);
- reg = *(volatile uint32_t *)(pex_base + PCI_ID_REG);
+ reg = le32toh(*(volatile uint32_t *)(pex_base + PCI_ID_REG));
model = PCI_PRODUCT(reg);
#if defined(ORION)
if (model == PCI_PRODUCT_MARVELL_88F5182) {
- reg = *(volatile uint32_t *)(regbase + ORION_PMI_BASE +
- ORION_PMI_SAMPLE_AT_RESET);
+ reg = le32toh(*(volatile uint32_t *)(regbase + ORION_PMI_BASE +
+ ORION_PMI_SAMPLE_AT_RESET));
if ((reg & ORION_PMISMPL_TCLK_MASK) == 0)
model = PCI_PRODUCT_MARVELL_88F5082;
}
#endif
#if defined(KIRKWOOD)
if (model == PCI_PRODUCT_MARVELL_88F6281) {
- reg = *(volatile uint32_t *)(regbase + KIRKWOOD_MISC_BASE +
- KIRKWOOD_MISC_DEVICEID);
+ reg = le32toh(*(volatile uint32_t *)(regbase +
+ KIRKWOOD_MISC_BASE + KIRKWOOD_MISC_DEVICEID));
if (reg == 1) /* 88F6192 is 1 */
model = MARVELL_KIRKWOOD_88F6192;
}
@@ -1226,7 +1226,7 @@ mvsoc_rev(void)
KASSERT(regbase != 0xffffffff);
- reg = *(volatile uint32_t *)(pex_base + PCI_CLASS_REG);
+ reg = le32toh(*(volatile uint32_t *)(pex_base + PCI_CLASS_REG));
rev = PCI_REVISION(reg);
return rev;
@@ -1311,10 +1311,11 @@ mvsoc_target_ddr(uint32_t attr, uint32_t
aprint_error("unknwon ATTR: 0x%x", attr);
return -1;
}
- sizereg = *(volatile uint32_t *)(dsc_base + MVSOC_DSC_CSSR(cs));
+ sizereg = le32toh(*(volatile uint32_t *)(dsc_base +
+ MVSOC_DSC_CSSR(cs)));
if (sizereg & MVSOC_DSC_CSSR_WINEN) {
- baseaddrreg =
- *(volatile uint32_t *)(dsc_base + MVSOC_DSC_CSBAR(cs));
+ baseaddrreg = le32toh(*(volatile uint32_t *)(dsc_base +
+ MVSOC_DSC_CSBAR(cs)));
if (base != NULL)
*base = baseaddrreg & MVSOC_DSC_CSBAR_BASE_MASK;
@@ -1401,7 +1402,7 @@ mvsoc_target_axi(int tag, uint32_t *base
aprint_error("unknwon TAG: 0x%x", tag);
return -1;
}
- val = *(volatile uint32_t *)(regbase + MVSOC_AXI_MMAP1(cs));
+ val = le32toh(*(volatile uint32_t *)(regbase + MVSOC_AXI_MMAP1(cs)));
if (val & MVSOC_AXI_MMAP1_VALID) {
if (base != NULL)
*base = MVSOC_AXI_MMAP1_STARTADDRESS(val);
Index: src/sys/arch/arm/marvell/mvsocvar.h
diff -u src/sys/arch/arm/marvell/mvsocvar.h:1.12 src/sys/arch/arm/marvell/mvsocvar.h:1.13
--- src/sys/arch/arm/marvell/mvsocvar.h:1.12 Fri Mar 10 15:44:24 2017
+++ src/sys/arch/arm/marvell/mvsocvar.h Mon Aug 30 00:04:30 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsocvar.h,v 1.12 2017/03/10 15:44:24 skrll Exp $ */
+/* $NetBSD: mvsocvar.h,v 1.13 2021/08/30 00:04:30 rin Exp $ */
/*
* Copyright (c) 2007, 2010 KIYOHARA Takashi
* All rights reserved.
@@ -48,8 +48,10 @@ extern int gpp_npins, gpp_irqbase;
extern struct bus_space mvsoc_bs_tag;
extern struct arm32_bus_dma_tag mvsoc_bus_dma_tag;
-#define read_mlmbreg(o) (*(volatile uint32_t *)(mlmb_base + (o)))
-#define write_mlmbreg(o, v) (*(volatile uint32_t *)(mlmb_base + (o)) = (v))
+#define read_mlmbreg(o) \
+ le32toh(*(volatile uint32_t *)(mlmb_base + (o)))
+#define write_mlmbreg(o, v) \
+ (*(volatile uint32_t *)(mlmb_base + (o)) = htole32(v))
void mvsoc_bootstrap(bus_addr_t);
uint16_t mvsoc_model(void);
Index: src/sys/arch/arm/marvell/orion.c
diff -u src/sys/arch/arm/marvell/orion.c:1.6 src/sys/arch/arm/marvell/orion.c:1.7
--- src/sys/arch/arm/marvell/orion.c:1.6 Sat Jan 7 16:19:28 2017
+++ src/sys/arch/arm/marvell/orion.c Mon Aug 30 00:04:30 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: orion.c,v 1.6 2017/01/07 16:19:28 kiyohara Exp $ */
+/* $NetBSD: orion.c,v 1.7 2021/08/30 00:04:30 rin Exp $ */
/*
* Copyright (c) 2010 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: orion.c,v 1.6 2017/01/07 16:19:28 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: orion.c,v 1.7 2021/08/30 00:04:30 rin Exp $");
#define _INTR_PRIVATE
@@ -224,8 +224,8 @@ orion_getclks(vaddr_t iobase)
tclk_shift = 8;
}
- reg = *(volatile uint32_t *)(iobase + ORION_PMI_BASE +
- ORION_PMI_SAMPLE_AT_RESET);
+ reg = le32toh(*(volatile uint32_t *)(iobase + ORION_PMI_BASE +
+ ORION_PMI_SAMPLE_AT_RESET));
armddrclk = (reg >> armddrclk_shift) & ORION_PMISMPL_ARMDDRCLK_MASK;
if (model == PCI_PRODUCT_MARVELL_88F5281)
if (reg & ORION_PMISMPL_ARMDDRCLK_H_MASK)
Index: src/sys/arch/evbarm/marvell/marvell_machdep.c
diff -u src/sys/arch/evbarm/marvell/marvell_machdep.c:1.36 src/sys/arch/evbarm/marvell/marvell_machdep.c:1.37
--- src/sys/arch/evbarm/marvell/marvell_machdep.c:1.36 Tue Jul 16 14:41:47 2019
+++ src/sys/arch/evbarm/marvell/marvell_machdep.c Mon Aug 30 00:04:30 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: marvell_machdep.c,v 1.36 2019/07/16 14:41:47 skrll Exp $ */
+/* $NetBSD: marvell_machdep.c,v 1.37 2021/08/30 00:04:30 rin Exp $ */
/*
* Copyright (c) 2007, 2008, 2010 KIYOHARA Takashi
* All rights reserved.
@@ -25,7 +25,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: marvell_machdep.c,v 1.36 2019/07/16 14:41:47 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: marvell_machdep.c,v 1.37 2021/08/30 00:04:30 rin Exp $");
#include "opt_arm_debug.h"
#include "opt_console.h"
@@ -208,7 +208,8 @@ armadaxp_system_reset(void)
{
extern vaddr_t misc_base;
-#define write_miscreg(r, v) (*(volatile uint32_t *)(misc_base + (r)) = (v))
+#define write_miscreg(r, v) \
+ (*(volatile uint32_t *)(misc_base + (r)) = htole32(v))
/* Unmask soft reset */
write_miscreg(ARMADAXP_MISC_RSTOUTNMASKR,
