Module Name: src
Committed By: skrll
Date: Sat Oct 15 16:29:56 UTC 2022
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Comment re-arragement
To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/riscv/riscv/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/riscv/locore.S
diff -u src/sys/arch/riscv/riscv/locore.S:1.32 src/sys/arch/riscv/riscv/locore.S:1.33
--- src/sys/arch/riscv/riscv/locore.S:1.32 Sat Oct 15 16:20:32 2022
+++ src/sys/arch/riscv/riscv/locore.S Sat Oct 15 16:29:56 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.32 2022/10/15 16:20:32 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.33 2022/10/15 16:29:56 skrll Exp $ */
/*-
* Copyright (c) 2014, 2022 The NetBSD Foundation, Inc.
@@ -120,17 +120,17 @@ ENTRY_NP(start)
sub s8, s8, s11
+ PTR_LA s5, _C_LABEL(lwp0uspace)
+ PTR_LA s6, _C_LABEL(bootstk)
+
/*
* Our load address is not fixed, but our VA is. We need to construct
* an initial PDETAB.
+ *
+ * The space for the inital page table is included in the kernel
+ * .bss size calculation so we know the space exists.
*/
- PTR_LA s5, _C_LABEL(lwp0uspace)
- PTR_LA s6, _C_LABEL(bootstk)
-
- // The space for the inital page table is included in the kernel
- // .bss size calculation so we know the space exists.
-
li a1, 0
PTR_LA s2, _C_LABEL(l1_pte)
mv s4, s2 // last page table
