Module Name: src
Committed By: jmcneill
Date: Thu Oct 27 22:35:32 UTC 2022
Modified Files:
src/sys/arch/arm/xilinx: zynq_gpio.c
Log Message:
Fix bit macros
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/xilinx/zynq_gpio.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/xilinx/zynq_gpio.c
diff -u src/sys/arch/arm/xilinx/zynq_gpio.c:1.1 src/sys/arch/arm/xilinx/zynq_gpio.c:1.2
--- src/sys/arch/arm/xilinx/zynq_gpio.c:1.1 Thu Oct 27 09:41:28 2022
+++ src/sys/arch/arm/xilinx/zynq_gpio.c Thu Oct 27 22:35:31 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq_gpio.c,v 1.1 2022/10/27 09:41:28 jmcneill Exp $ */
+/* $NetBSD: zynq_gpio.c,v 1.2 2022/10/27 22:35:31 jmcneill Exp $ */
/*-
* Copyright (c) 2022 Jared McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,v 1.1 2022/10/27 09:41:28 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,v 1.2 2022/10/27 22:35:31 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bitops.h>
@@ -48,11 +48,11 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,
#define MASK_DATA_REG(pin) (0x000 + 0x4 * ((pin) / 16))
#define MASK_DATA_SET(pin, val) ((((pin) % 16) << 16) | ((val) << ((pin) % 16)))
#define DATA_RO_REG(pin) (0x060 + 0x4 * ((pin) / 32))
-#define DATA_RO_BIT(pin) ((pin) % 32)
+#define DATA_RO_BIT(pin) __BIT((pin) % 32)
#define DIRM_REG(pin) (0x204 + 0x40 * ((pin) / 32))
-#define DIRM_BIT(pin) ((pin) % 32)
+#define DIRM_BIT(pin) __BIT((pin) % 32)
#define OEN_REG(pin) (0x208 + 0x40 * ((pin) / 32))
-#define OEN_BIT(pin) ((pin) % 32)
+#define OEN_BIT(pin) __BIT((pin) % 32)
static const struct device_compatible_entry compat_data[] = {
{ .compat = "xlnx,zynq-gpio-1.0" },
