Module Name: src
Committed By: andvar
Date: Sat May 6 21:53:27 UTC 2023
Modified Files:
src/sys/arch/aarch64/include: armreg.h
src/sys/arch/mips/include: mipsNN.h
src/sys/dev/mii: brgphyreg.h
src/sys/dev/pci: hifn7751.c ubsec.c
Log Message:
s/Regiser/Register/ and s/regester/register/ in comments.
To generate a diff of this commit:
cvs rdiff -u -r1.63 -r1.64 src/sys/arch/aarch64/include/armreg.h
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/mips/include/mipsNN.h
cvs rdiff -u -r1.12 -r1.13 src/sys/dev/mii/brgphyreg.h
cvs rdiff -u -r1.80 -r1.81 src/sys/dev/pci/hifn7751.c
cvs rdiff -u -r1.62 -r1.63 src/sys/dev/pci/ubsec.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/armreg.h
diff -u src/sys/arch/aarch64/include/armreg.h:1.63 src/sys/arch/aarch64/include/armreg.h:1.64
--- src/sys/arch/aarch64/include/armreg.h:1.63 Thu Dec 1 00:32:52 2022
+++ src/sys/arch/aarch64/include/armreg.h Sat May 6 21:53:26 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.63 2022/12/01 00:32:52 ryo Exp $ */
+/* $NetBSD: armreg.h,v 1.64 2023/05/06 21:53:26 andvar Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -619,7 +619,7 @@ AARCH64REG_WRITE_INLINE3(APGAKeyHi_EL1,
AARCH64REG_READ_INLINE3(pan, pan, ATTR_ARCH("armv8.1-a"))
AARCH64REG_WRITE_INLINE3(pan, pan, ATTR_ARCH("armv8.1-a"))
-AARCH64REG_READ_INLINE(cpacr_el1) // Coprocessor Access Control Regiser
+AARCH64REG_READ_INLINE(cpacr_el1) // Coprocessor Access Control Register
AARCH64REG_WRITE_INLINE(cpacr_el1)
#define CPACR_TTA __BIT(28) // System Register Access Traps
Index: src/sys/arch/mips/include/mipsNN.h
diff -u src/sys/arch/mips/include/mipsNN.h:1.13 src/sys/arch/mips/include/mipsNN.h:1.14
--- src/sys/arch/mips/include/mipsNN.h:1.13 Tue Nov 8 13:04:49 2022
+++ src/sys/arch/mips/include/mipsNN.h Sat May 6 21:53:26 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: mipsNN.h,v 1.13 2022/11/08 13:04:49 simonb Exp $ */
+/* $NetBSD: mipsNN.h,v 1.14 2023/05/06 21:53:26 andvar Exp $ */
/*
* Copyright 2000, 2001
@@ -462,7 +462,7 @@
/* "LLB" (R): Load-Linked Bit (LLB) is present in COP0 LLAddr. */
#define MIPSNN_CFG5_LLB __BIT(4)
-/* "MRP" (R): COP0 Memory Accessibility Attributes Regisers are present. */
+/* "MRP" (R): COP0 Memory Accessibility Attributes Registers are present. */
#define MIPSNN_CFG5_MRP __BIT(3)
/* "UFR" (R): Allows user-mode access to Status[FR] using CTC1/CFC1. */
Index: src/sys/dev/mii/brgphyreg.h
diff -u src/sys/dev/mii/brgphyreg.h:1.12 src/sys/dev/mii/brgphyreg.h:1.13
--- src/sys/dev/mii/brgphyreg.h:1.12 Mon May 25 19:48:38 2020
+++ src/sys/dev/mii/brgphyreg.h Sat May 6 21:53:26 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: brgphyreg.h,v 1.12 2020/05/25 19:48:38 jmcneill Exp $ */
+/* $NetBSD: brgphyreg.h,v 1.13 2023/05/06 21:53:26 andvar Exp $ */
/*
* Copyright (c) 2000
@@ -237,7 +237,7 @@
#define BRGPHY_5708S_BMCR_2500 0x20
-/* Autoneg Next Page Transmit 1 Regiser */
+/* Autoneg Next Page Transmit 1 Register */
#define BRGPHY_5708S_ANEG_NXT_PG_XMIT1 0x0B
#define BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G 0x0001
Index: src/sys/dev/pci/hifn7751.c
diff -u src/sys/dev/pci/hifn7751.c:1.80 src/sys/dev/pci/hifn7751.c:1.81
--- src/sys/dev/pci/hifn7751.c:1.80 Sun May 22 11:39:27 2022
+++ src/sys/dev/pci/hifn7751.c Sat May 6 21:53:26 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: hifn7751.c,v 1.80 2022/05/22 11:39:27 riastradh Exp $ */
+/* $NetBSD: hifn7751.c,v 1.81 2023/05/06 21:53:26 andvar Exp $ */
/* $OpenBSD: hifn7751.c,v 1.179 2020/01/11 21:34:03 cheloha Exp $ */
/*
@@ -47,7 +47,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: hifn7751.c,v 1.80 2022/05/22 11:39:27 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: hifn7751.c,v 1.81 2023/05/06 21:53:26 andvar Exp $");
#include <sys/param.h>
#include <sys/cprng.h>
@@ -752,7 +752,7 @@ hifn_set_retry(struct hifn_softc *sc)
}
/*
- * Resets the board. Values in the regesters are left as is
+ * Resets the board. Values in the registers are left as is
* from the reset (i.e. initial values are assigned elsewhere).
*/
static void
Index: src/sys/dev/pci/ubsec.c
diff -u src/sys/dev/pci/ubsec.c:1.62 src/sys/dev/pci/ubsec.c:1.63
--- src/sys/dev/pci/ubsec.c:1.62 Sat Aug 27 05:35:17 2022
+++ src/sys/dev/pci/ubsec.c Sat May 6 21:53:26 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: ubsec.c,v 1.62 2022/08/27 05:35:17 skrll Exp $ */
+/* $NetBSD: ubsec.c,v 1.63 2023/05/06 21:53:26 andvar Exp $ */
/* $FreeBSD: src/sys/dev/ubsec/ubsec.c,v 1.6.2.6 2003/01/23 21:06:43 sam Exp $ */
/* $OpenBSD: ubsec.c,v 1.143 2009/03/27 13:31:30 reyk Exp$ */
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ubsec.c,v 1.62 2022/08/27 05:35:17 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ubsec.c,v 1.63 2023/05/06 21:53:26 andvar Exp $");
#undef UBSEC_DEBUG
@@ -2168,7 +2168,7 @@ ubsec_dma_free(struct ubsec_softc *sc, s
}
/*
- * Resets the board. Values in the regesters are left as is
+ * Resets the board. Values in the registers are left as is
* from the reset (i.e. initial values are assigned elsewhere).
*/
static void
