Module Name: src
Committed By: dyoung
Date: Thu Jul 23 21:22:25 UTC 2009
Modified Files:
src/sys/dev/pci: pccbb.c pccbbvar.h
Log Message:
Use kpause(9), cv_timedwait(9), and cv_signal(9) instead of tsleep(9)
and wakeup(9).
Use mstohz(9).
XXX Protection against spurious wakeups is still needed, but this patch
XXX makes the code no worse than before in this regard.
To generate a diff of this commit:
cvs rdiff -u -r1.188 -r1.189 src/sys/dev/pci/pccbb.c
cvs rdiff -u -r1.37 -r1.38 src/sys/dev/pci/pccbbvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/pccbb.c
diff -u src/sys/dev/pci/pccbb.c:1.188 src/sys/dev/pci/pccbb.c:1.189
--- src/sys/dev/pci/pccbb.c:1.188 Thu May 21 17:32:32 2009
+++ src/sys/dev/pci/pccbb.c Thu Jul 23 21:22:25 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: pccbb.c,v 1.188 2009/05/21 17:32:32 dyoung Exp $ */
+/* $NetBSD: pccbb.c,v 1.189 2009/07/23 21:22:25 dyoung Exp $ */
/*
* Copyright (c) 1998, 1999 and 2000
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pccbb.c,v 1.188 2009/05/21 17:32:32 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pccbb.c,v 1.189 2009/07/23 21:22:25 dyoung Exp $");
/*
#define CBB_DEBUG
@@ -89,12 +89,12 @@
* of delay() if you want to wait more than 1 ms.
*/
static inline void
-delay_ms(int millis, void *param)
+delay_ms(int millis, struct pccbb_softc *sc)
{
if (cold)
delay(millis * 1000);
else
- tsleep(param, PWAIT, "pccbb", MAX(2, hz * millis / 1000));
+ kpause("pccbb", false, mstohz(millis), NULL);
}
int pcicbbmatch(device_t, cfdata_t, void *);
@@ -422,6 +422,9 @@
sc->sc_dev = self;
+ mutex_init(&sc->sc_pwr_mtx, MUTEX_DEFAULT, IPL_BIO);
+ cv_init(&sc->sc_pwr_cv, "pccpwr");
+
callout_init(&sc->sc_insert_ch, 0);
callout_setfunc(&sc->sc_insert_ch, pci113x_insert, sc);
@@ -1069,8 +1072,10 @@
if (sockevent & CB_SOCKET_EVENT_POWER) {
DPRINTF(("Powercycling because of socket event\n"));
/* XXX: Does not happen when attaching a 16-bit card */
+ mutex_enter(&sc->sc_pwr_mtx);
sc->sc_pwrcycle++;
- wakeup(&sc->sc_pwrcycle);
+ cv_signal(&sc->sc_pwr_cv);
+ mutex_exit(&sc->sc_pwr_mtx);
}
/* Sometimes a change of CSTSCHG# accompanies the first
@@ -1129,7 +1134,7 @@
if (sc->sc_flags & CBB_INSERTING) {
callout_stop(&sc->sc_insert_ch);
}
- callout_schedule(&sc->sc_insert_ch, hz / 5);
+ callout_schedule(&sc->sc_insert_ch, mstohz(200));
sc->sc_flags |= CBB_INSERTING;
}
}
@@ -1197,7 +1202,7 @@
/* who are you? */
}
} else {
- callout_schedule(&sc->sc_insert_ch, hz / 10);
+ callout_schedule(&sc->sc_insert_ch, mstohz(100));
}
}
@@ -1285,7 +1290,7 @@
u_int32_t status, osock_ctrl, sock_ctrl, reg_ctrl;
bus_space_tag_t memt = sc->sc_base_memt;
bus_space_handle_t memh = sc->sc_base_memh;
- int on = 0, pwrcycle, s, times;
+ int on = 0, pwrcycle, times;
struct timeval before, after, diff;
DPRINTF(("pccbb_power: %s and %s [0x%x]\n",
@@ -1352,13 +1357,13 @@
sock_ctrl |= CB_SOCKET_CTRL_VPP_12V;
break;
}
-
- pwrcycle = sc->sc_pwrcycle;
aprint_debug_dev(sc->sc_dev, "osock_ctrl %#" PRIx32
" sock_ctrl %#" PRIx32 "\n", osock_ctrl, sock_ctrl);
microtime(&before);
- s = splbio();
+ mutex_enter(&sc->sc_pwr_mtx);
+ pwrcycle = sc->sc_pwrcycle;
+
bus_space_write_4(memt, memh, CB_SOCKET_CTRL, sock_ctrl);
/*
@@ -1380,8 +1385,8 @@
if (cold)
DELAY(40 * 1000);
else {
- (void)tsleep(&sc->sc_pwrcycle, PWAIT, "pccpwr",
- hz / 25);
+ (void)cv_timedwait(&sc->sc_pwr_cv, &sc->sc_pwr_mtx,
+ mstohz(40));
if (pwrcycle == sc->sc_pwrcycle)
continue;
}
@@ -1391,7 +1396,7 @@
if ((status & CB_SOCKET_STAT_PWRCYCLE) == 0 && !on)
break;
}
- splx(s);
+ mutex_exit(&sc->sc_pwr_mtx);
microtime(&after);
timersub(&after, &before, &diff);
aprint_debug_dev(sc->sc_dev, "wait took%s %lld.%06lds\n",
@@ -2307,7 +2312,7 @@
panic("pccbb_pcmcia_delay: called in interrupt context");
#endif
DPRINTF(("pccbb_pcmcia_delay: \"%s\", sleep %d ms\n", wmesg, timo));
- tsleep(pccbb_pcmcia_delay, PWAIT, wmesg, roundup(timo * hz, 1000) / 1000);
+ kpause(wmesg, false, max(mstohz(timo), 1), NULL);
}
/*
Index: src/sys/dev/pci/pccbbvar.h
diff -u src/sys/dev/pci/pccbbvar.h:1.37 src/sys/dev/pci/pccbbvar.h:1.38
--- src/sys/dev/pci/pccbbvar.h:1.37 Thu Jun 26 20:57:10 2008
+++ src/sys/dev/pci/pccbbvar.h Thu Jul 23 21:22:25 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: pccbbvar.h,v 1.37 2008/06/26 20:57:10 drochner Exp $ */
+/* $NetBSD: pccbbvar.h,v 1.38 2009/07/23 21:22:25 dyoung Exp $ */
/*
* Copyright (c) 1999 HAYAKAWA Koichi. All rights reserved.
*
@@ -36,6 +36,9 @@
#ifndef _DEV_PCI_PCCBBVAR_H_
#define _DEV_PCI_PCCBBVAR_H_
+#include <sys/mutex.h>
+#include <sys/condvar.h>
+
#define PCIC_FLAG_SOCKETP 0x0001
#define PCIC_FLAG_CARDP 0x0002
@@ -133,6 +136,8 @@
#define PCCBB_PCMCIA_MEM_32 0x02 /* 32-bit memory address ready */
volatile int sc_pwrcycle;
+ kcondvar_t sc_pwr_cv;
+ kmutex_t sc_pwr_mtx;
/* interrupt handler list on the bridge */
LIST_HEAD(, pccbb_intrhand_list) sc_pil;
