Module Name: src
Committed By: matt
Date: Sun Aug 23 03:51:35 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: endian_machdep.h
Log Message:
Add REG_SHI and REG_SLO
To generate a diff of this commit:
cvs rdiff -u -r1.1.154.1 -r1.1.154.2 \
src/sys/arch/mips/include/endian_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/endian_machdep.h
diff -u src/sys/arch/mips/include/endian_machdep.h:1.1.154.1 src/sys/arch/mips/include/endian_machdep.h:1.1.154.2
--- src/sys/arch/mips/include/endian_machdep.h:1.1.154.1 Thu Aug 20 10:05:34 2009
+++ src/sys/arch/mips/include/endian_machdep.h Sun Aug 23 03:51:35 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: endian_machdep.h,v 1.1.154.1 2009/08/20 10:05:34 matt Exp $ */
+/* $NetBSD: endian_machdep.h,v 1.1.154.2 2009/08/23 03:51:35 matt Exp $ */
#ifndef _BYTE_ORDER
# error Define MIPS target CPU endian-ness in port-specific header file.
@@ -17,9 +17,13 @@
# if SZREG == 4
# define REG_LHI lwr
# define REG_LLO lwl
+# define REG_SHI swr
+# define REG_SLO swl
# else
# define REG_LHI ldr
# define REG_LLO ldl
+# define REG_SHI sdr
+# define REG_SLO sdl
# endif
#endif
@@ -31,9 +35,13 @@
# if SZREG == 4
# define REG_LHI lwl
# define REG_LLO lwr
+# define REG_SHI swl
+# define REG_SLO swr
# else
# define REG_LHI ldl
# define REG_LLO ldr
+# define REG_SHI sdl
+# define REG_SLO sdr
# endif
#endif
