Module Name: src
Committed By: tsutsui
Date: Fri Sep 18 14:35:11 UTC 2009
Modified Files:
src/sys/dev/sbus: be.c
Log Message:
Misc KNF.
To generate a diff of this commit:
cvs rdiff -u -r1.72 -r1.73 src/sys/dev/sbus/be.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/sbus/be.c
diff -u src/sys/dev/sbus/be.c:1.72 src/sys/dev/sbus/be.c:1.73
--- src/sys/dev/sbus/be.c:1.72 Fri Sep 18 14:14:06 2009
+++ src/sys/dev/sbus/be.c Fri Sep 18 14:35:11 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: be.c,v 1.72 2009/09/18 14:14:06 tsutsui Exp $ */
+/* $NetBSD: be.c,v 1.73 2009/09/18 14:35:11 tsutsui Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@@ -57,7 +57,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: be.c,v 1.72 2009/09/18 14:14:06 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: be.c,v 1.73 2009/09/18 14:35:11 tsutsui Exp $");
#include "opt_ddb.h"
#include "opt_inet.h"
@@ -152,7 +152,7 @@
struct qec_ring sc_rb; /* Packet Ring Buffer */
/* MAC address */
- u_int8_t sc_enaddr[6];
+ uint8_t sc_enaddr[ETHER_ADDR_LEN];
#ifdef BEDEBUG
int sc_debug;
#endif
@@ -172,8 +172,8 @@
static int beintr(void *);
static int berint(struct be_softc *);
static int betint(struct be_softc *);
-static int beqint(struct be_softc *, u_int32_t);
-static int beeint(struct be_softc *, u_int32_t);
+static int beqint(struct be_softc *, uint32_t);
+static int beeint(struct be_softc *, uint32_t);
static void be_read(struct be_softc *, int, int);
static int be_put(struct be_softc *, int, struct mbuf *);
@@ -194,7 +194,7 @@
/* MII helpers */
static void be_mii_sync(struct be_softc *);
-static void be_mii_sendbits(struct be_softc *, int, u_int32_t, int);
+static void be_mii_sendbits(struct be_softc *, int, uint32_t, int);
static int be_mii_reset(struct be_softc *, int);
static int be_tcvr_read_bit(struct be_softc *, int);
static void be_tcvr_write_bit(struct be_softc *, int, int);
@@ -215,7 +215,7 @@
{
struct sbus_attach_args *sa = aux;
- return (strcmp(cf->cf_name, sa->sa_name) == 0);
+ return strcmp(cf->cf_name, sa->sa_name) == 0;
}
void
@@ -233,7 +233,7 @@
bus_size_t size;
int instance;
int rseg, error;
- u_int32_t v;
+ uint32_t v;
sc->sc_dev = self;
@@ -243,31 +243,25 @@
}
if (bus_space_map(sa->sa_bustag,
- (bus_addr_t)BUS_ADDR(
- sa->sa_reg[0].oa_space,
- sa->sa_reg[0].oa_base),
- (bus_size_t)sa->sa_reg[0].oa_size,
- 0, &sc->sc_cr) != 0) {
+ (bus_addr_t)BUS_ADDR(sa->sa_reg[0].oa_space, sa->sa_reg[0].oa_base),
+ (bus_size_t)sa->sa_reg[0].oa_size,
+ 0, &sc->sc_cr) != 0) {
printf(": cannot map registers\n");
return;
}
if (bus_space_map(sa->sa_bustag,
- (bus_addr_t)BUS_ADDR(
- sa->sa_reg[1].oa_space,
- sa->sa_reg[1].oa_base),
- (bus_size_t)sa->sa_reg[1].oa_size,
- 0, &sc->sc_br) != 0) {
+ (bus_addr_t)BUS_ADDR(sa->sa_reg[1].oa_space, sa->sa_reg[1].oa_base),
+ (bus_size_t)sa->sa_reg[1].oa_size,
+ 0, &sc->sc_br) != 0) {
printf(": cannot map registers\n");
return;
}
if (bus_space_map(sa->sa_bustag,
- (bus_addr_t)BUS_ADDR(
- sa->sa_reg[2].oa_space,
- sa->sa_reg[2].oa_base),
- (bus_size_t)sa->sa_reg[2].oa_size,
- 0, &sc->sc_tr) != 0) {
+ (bus_addr_t)BUS_ADDR(sa->sa_reg[2].oa_space, sa->sa_reg[2].oa_base),
+ (bus_size_t)sa->sa_reg[2].oa_size,
+ 0, &sc->sc_tr) != 0) {
printf(": cannot map registers\n");
return;
}
@@ -295,7 +289,7 @@
/* Establish interrupt handler */
if (sa->sa_nintr)
(void)bus_intr_establish(sa->sa_bustag, sa->sa_pri, IPL_NET,
- beintr, sc);
+ beintr, sc);
prom_getether(node, sc->sc_enaddr);
printf(" address %s\n", ether_sprintf(sc->sc_enaddr));
@@ -308,42 +302,38 @@
sc->sc_rb.rb_ntbuf = QEC_XD_RING_MAXSIZE;
sc->sc_rb.rb_nrbuf = QEC_XD_RING_MAXSIZE;
- size = QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) +
- QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) +
- sc->sc_rb.rb_ntbuf * BE_PKT_BUF_SZ +
- sc->sc_rb.rb_nrbuf * BE_PKT_BUF_SZ;
+ size =
+ QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) +
+ QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd) +
+ sc->sc_rb.rb_ntbuf * BE_PKT_BUF_SZ +
+ sc->sc_rb.rb_nrbuf * BE_PKT_BUF_SZ;
/* Get a DMA handle */
if ((error = bus_dmamap_create(dmatag, size, 1, size, 0,
- BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
+ BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
aprint_error_dev(self, "DMA map create error %d\n", error);
return;
}
/* Allocate DMA buffer */
if ((error = bus_dmamem_alloc(sa->sa_dmatag, size, 0, 0,
- &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
- aprint_error_dev(self, "DMA buffer alloc error %d\n",
- error);
+ &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
+ aprint_error_dev(self, "DMA buffer alloc error %d\n", error);
return;
}
/* Map DMA memory in CPU addressable space */
if ((error = bus_dmamem_map(sa->sa_dmatag, &seg, rseg, size,
- &sc->sc_rb.rb_membase,
- BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
- aprint_error_dev(self, "DMA buffer map error %d\n",
- error);
+ &sc->sc_rb.rb_membase, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
+ aprint_error_dev(self, "DMA buffer map error %d\n", error);
bus_dmamem_free(sa->sa_dmatag, &seg, rseg);
return;
}
/* Load the buffer */
if ((error = bus_dmamap_load(dmatag, sc->sc_dmamap,
- sc->sc_rb.rb_membase, size, NULL,
- BUS_DMA_NOWAIT)) != 0) {
- aprint_error_dev(self, "DMA buffer map load error %d\n",
- error);
+ sc->sc_rb.rb_membase, size, NULL, BUS_DMA_NOWAIT)) != 0) {
+ aprint_error_dev(self, "DMA buffer map load error %d\n", error);
bus_dmamem_unmap(dmatag, sc->sc_rb.rb_membase, size);
bus_dmamem_free(dmatag, &seg, rseg);
return;
@@ -377,10 +367,10 @@
if (child == NULL) {
/* No PHY attached */
ifmedia_add(&sc->sc_media,
- IFM_MAKEWORD(IFM_ETHER,IFM_NONE,0,instance),
- 0, NULL);
+ IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, instance),
+ 0, NULL);
ifmedia_set(&sc->sc_media,
- IFM_MAKEWORD(IFM_ETHER,IFM_NONE,0,instance));
+ IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, instance));
} else {
/*
* Note: we support just one PHY on the external
@@ -409,7 +399,7 @@
* phy indeed has the auto negotiation capability!!
*/
ifmedia_set(&sc->sc_media,
- IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,instance));
+ IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, instance));
/* Mark our current media setting */
be_pal_gate(sc, BE_PHY_EXTERNAL);
@@ -431,27 +421,27 @@
/* Use `ifm_data' to store BMCR bits */
ifmedia_add(&sc->sc_media,
- IFM_MAKEWORD(IFM_ETHER,IFM_10_T,0,instance),
- 0, NULL);
+ IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, instance),
+ 0, NULL);
ifmedia_add(&sc->sc_media,
- IFM_MAKEWORD(IFM_ETHER,IFM_100_TX,0,instance),
- BMCR_S100, NULL);
+ IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, instance),
+ BMCR_S100, NULL);
ifmedia_add(&sc->sc_media,
- IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,instance),
- 0, NULL);
+ IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, instance),
+ 0, NULL);
printf("on-board transceiver at %s: 10baseT, 100baseTX, auto\n",
- device_xname(self));
+ device_xname(self));
be_mii_reset(sc, BE_PHY_INTERNAL);
/* Only set default medium here if there's no external PHY */
if (instance == 0) {
be_pal_gate(sc, BE_PHY_INTERNAL);
ifmedia_set(&sc->sc_media,
- IFM_MAKEWORD(IFM_ETHER,IFM_AUTO,0,instance));
+ IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, instance));
} else
be_mii_writereg(self,
- BE_PHY_INTERNAL, MII_BMCR, BMCR_ISO);
+ BE_PHY_INTERNAL, MII_BMCR, BMCR_ISO);
}
memcpy(ifp->if_xname, device_xname(self), IFNAMSIZ);
@@ -462,7 +452,7 @@
ifp->if_init = beinit;
ifp->if_stop = bestop;
ifp->if_flags =
- IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
+ IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
IFQ_SET_READY(&ifp->if_snd);
/* claim 802.1q capability */
@@ -498,7 +488,7 @@
tlen += len;
MFREE(m, n);
}
- return (tlen);
+ return tlen;
}
/*
@@ -552,7 +542,7 @@
mp = &m->m_next;
}
- return (top);
+ return top;
}
/*
@@ -569,7 +559,7 @@
#ifdef BEDEBUG
if (sc->sc_debug)
printf("%s: invalid packet size %d; dropping\n",
- ifp->if_xname, len);
+ ifp->if_xname, len);
#endif
ifp->if_ierrors++;
return;
@@ -643,9 +633,9 @@
* Initialize transmit registers and start transmission
*/
txd[bix].xd_flags = QEC_XD_OWN | QEC_XD_SOP | QEC_XD_EOP |
- (len & QEC_XD_LENGTH);
- bus_space_write_4(sc->sc_bustag, sc->sc_cr, BE_CRI_CTRL,
- BE_CR_CTRL_TWAKEUP);
+ (len & QEC_XD_LENGTH);
+ bus_space_write_4(sc->sc_bustag, sc->sc_cr,
+ BE_CRI_CTRL, BE_CR_CTRL_TWAKEUP);
if (++bix == QEC_XD_RING_MAXSIZE)
bix = 0;
@@ -729,7 +719,7 @@
{
struct be_softc *sc = arg;
bus_space_tag_t t = sc->sc_bustag;
- u_int32_t whyq, whyb, whyc;
+ uint32_t whyq, whyb, whyc;
int r = 0;
/* Read QEC status, channel status and BE status */
@@ -749,14 +739,14 @@
if (whyq & QEC_STAT_RX && whyc & BE_CR_STAT_RXIRQ)
r |= berint(sc);
- return (r);
+ return r;
}
/*
* QEC Interrupt.
*/
int
-beqint(struct be_softc *sc, u_int32_t why)
+beqint(struct be_softc *sc, uint32_t why)
{
device_t self = sc->sc_dev;
int r = 0, rst = 0;
@@ -819,7 +809,7 @@
if (!r) {
rst = 1;
aprint_error_dev(self, "unexpected error interrupt %08x\n",
- why);
+ why);
}
if (rst) {
@@ -827,14 +817,14 @@
bereset(sc);
}
- return (r);
+ return r;
}
/*
* Error interrupt.
*/
int
-beeint(struct be_softc *sc, u_int32_t why)
+beeint(struct be_softc *sc, uint32_t why)
{
device_t self = sc->sc_dev;
int r = 0, rst = 0;
@@ -858,7 +848,7 @@
if (!r) {
rst = 1;
aprint_error_dev(self, "unexpected error interrupt %08x\n",
- why);
+ why);
}
if (rst) {
@@ -866,7 +856,7 @@
bereset(sc);
}
- return (r);
+ return r;
}
/*
@@ -884,10 +874,10 @@
* Unload collision counters
*/
ifp->if_collisions +=
- bus_space_read_4(t, br, BE_BRI_NCCNT) +
- bus_space_read_4(t, br, BE_BRI_FCCNT) +
- bus_space_read_4(t, br, BE_BRI_EXCNT) +
- bus_space_read_4(t, br, BE_BRI_LTCNT);
+ bus_space_read_4(t, br, BE_BRI_NCCNT) +
+ bus_space_read_4(t, br, BE_BRI_FCCNT) +
+ bus_space_read_4(t, br, BE_BRI_EXCNT) +
+ bus_space_read_4(t, br, BE_BRI_LTCNT);
/*
* the clear the hardware counters
@@ -924,7 +914,7 @@
if (sc->sc_rb.rb_td_nbusy == 0)
ifp->if_timer = 0;
- return (1);
+ return 1;
}
/*
@@ -952,7 +942,7 @@
/* ... */
xd[(bix+nrbuf) % QEC_XD_RING_MAXSIZE].xd_flags =
- QEC_XD_OWN | (BE_PKT_BUF_SZ & QEC_XD_LENGTH);
+ QEC_XD_OWN | (BE_PKT_BUF_SZ & QEC_XD_LENGTH);
if (++bix == QEC_XD_RING_MAXSIZE)
bix = 0;
@@ -960,7 +950,7 @@
sc->sc_rb.rb_rdtail = bix;
- return (1);
+ return 1;
}
int
@@ -1043,7 +1033,7 @@
break;
}
splx(s);
- return (error);
+ return error;
}
@@ -1055,9 +1045,9 @@
bus_space_handle_t br = sc->sc_br;
bus_space_handle_t cr = sc->sc_cr;
struct qec_softc *qec = sc->sc_qec;
- u_int32_t v;
- u_int32_t qecaddr;
- u_int8_t *ea;
+ uint32_t v;
+ uint32_t qecaddr;
+ uint8_t *ea;
int rc, s;
s = splnet();
@@ -1085,8 +1075,8 @@
bus_space_write_4(t, br, BE_BRI_RANDSEED, 0xbd);
- bus_space_write_4(t, br, BE_BRI_XIFCFG,
- BE_BR_XCFG_ODENABLE | BE_BR_XCFG_RESV);
+ bus_space_write_4(t, br,
+ BE_BRI_XIFCFG, BE_BR_XCFG_ODENABLE | BE_BR_XCFG_RESV);
bus_space_write_4(t, br, BE_BRI_JSIZE, 4);
@@ -1095,22 +1085,22 @@
* 'gotframe' and 'sentframe'
*/
bus_space_write_4(t, br, BE_BRI_IMASK,
- BE_BR_IMASK_GOTFRAME |
- BE_BR_IMASK_RCNTEXP |
- BE_BR_IMASK_ACNTEXP |
- BE_BR_IMASK_CCNTEXP |
- BE_BR_IMASK_LCNTEXP |
- BE_BR_IMASK_CVCNTEXP |
- BE_BR_IMASK_SENTFRAME |
- BE_BR_IMASK_NCNTEXP |
- BE_BR_IMASK_ECNTEXP |
- BE_BR_IMASK_LCCNTEXP |
- BE_BR_IMASK_FCNTEXP |
- BE_BR_IMASK_DTIMEXP);
+ BE_BR_IMASK_GOTFRAME |
+ BE_BR_IMASK_RCNTEXP |
+ BE_BR_IMASK_ACNTEXP |
+ BE_BR_IMASK_CCNTEXP |
+ BE_BR_IMASK_LCNTEXP |
+ BE_BR_IMASK_CVCNTEXP |
+ BE_BR_IMASK_SENTFRAME |
+ BE_BR_IMASK_NCNTEXP |
+ BE_BR_IMASK_ECNTEXP |
+ BE_BR_IMASK_LCCNTEXP |
+ BE_BR_IMASK_FCNTEXP |
+ BE_BR_IMASK_DTIMEXP);
/* Channel registers: */
- bus_space_write_4(t, cr, BE_CRI_RXDS, (u_int32_t)sc->sc_rb.rb_rxddma);
- bus_space_write_4(t, cr, BE_CRI_TXDS, (u_int32_t)sc->sc_rb.rb_txddma);
+ bus_space_write_4(t, cr, BE_CRI_RXDS, (uint32_t)sc->sc_rb.rb_rxddma);
+ bus_space_write_4(t, cr, BE_CRI_TXDS, (uint32_t)sc->sc_rb.rb_txddma);
qecaddr = sc->sc_channel * qec->sc_msize;
bus_space_write_4(t, cr, BE_CRI_RXWBUF, qecaddr);
@@ -1132,8 +1122,8 @@
bus_space_write_4(t, br, BE_BRI_TXMAX, v);
/* Enable transmitter */
- bus_space_write_4(t, br, BE_BRI_TXCFG,
- BE_BR_TXCFG_FIFO | BE_BR_TXCFG_ENABLE);
+ bus_space_write_4(t, br,
+ BE_BRI_TXCFG, BE_BR_TXCFG_FIFO | BE_BR_TXCFG_ENABLE);
/* Enable receiver */
v = bus_space_read_4(t, br, BE_BRI_RXCFG);
@@ -1161,10 +1151,10 @@
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
bus_space_tag_t t = sc->sc_bustag;
bus_space_handle_t br = sc->sc_br;
- u_int32_t crc;
- u_int16_t hash[4];
- u_int8_t octet;
- u_int32_t v;
+ uint32_t crc;
+ uint16_t hash[4];
+ uint8_t octet;
+ uint32_t v;
int i, j;
struct ether_multi *enm;
struct ether_multistep step;
@@ -1249,12 +1239,11 @@
while (n--) {
bus_space_write_4(t, tr, BE_TRI_MGMTPAL,
- MGMT_PAL_INT_MDIO | MGMT_PAL_EXT_MDIO |
- MGMT_PAL_OENAB);
+ MGMT_PAL_INT_MDIO | MGMT_PAL_EXT_MDIO | MGMT_PAL_OENAB);
(void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL);
bus_space_write_4(t, tr, BE_TRI_MGMTPAL,
- MGMT_PAL_INT_MDIO | MGMT_PAL_EXT_MDIO |
- MGMT_PAL_OENAB | MGMT_PAL_DCLOCK);
+ MGMT_PAL_INT_MDIO | MGMT_PAL_EXT_MDIO |
+ MGMT_PAL_OENAB | MGMT_PAL_DCLOCK);
(void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL);
}
}
@@ -1264,7 +1253,7 @@
{
bus_space_tag_t t = sc->sc_bustag;
bus_space_handle_t tr = sc->sc_tr;
- u_int32_t v;
+ uint32_t v;
be_mii_sync(sc);
@@ -1286,22 +1275,22 @@
if (phy == BE_PHY_INTERNAL) {
bus_space_write_4(t, tr, BE_TRI_MGMTPAL, MGMT_PAL_EXT_MDIO);
(void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL);
- bus_space_write_4(t, tr, BE_TRI_MGMTPAL,
- MGMT_PAL_EXT_MDIO | MGMT_PAL_DCLOCK);
+ bus_space_write_4(t, tr,
+ BE_TRI_MGMTPAL, MGMT_PAL_EXT_MDIO | MGMT_PAL_DCLOCK);
(void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL);
ret = (bus_space_read_4(t, tr, BE_TRI_MGMTPAL) &
- MGMT_PAL_INT_MDIO) >> MGMT_PAL_INT_MDIO_SHIFT;
+ MGMT_PAL_INT_MDIO) >> MGMT_PAL_INT_MDIO_SHIFT;
} else {
bus_space_write_4(t, tr, BE_TRI_MGMTPAL, MGMT_PAL_INT_MDIO);
(void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL);
ret = (bus_space_read_4(t, tr, BE_TRI_MGMTPAL) &
- MGMT_PAL_EXT_MDIO) >> MGMT_PAL_EXT_MDIO_SHIFT;
- bus_space_write_4(t, tr, BE_TRI_MGMTPAL,
- MGMT_PAL_INT_MDIO | MGMT_PAL_DCLOCK);
+ MGMT_PAL_EXT_MDIO) >> MGMT_PAL_EXT_MDIO_SHIFT;
+ bus_space_write_4(t, tr,
+ BE_TRI_MGMTPAL, MGMT_PAL_INT_MDIO | MGMT_PAL_DCLOCK);
(void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL);
}
- return (ret);
+ return ret;
}
static void
@@ -1309,14 +1298,14 @@
{
bus_space_tag_t t = sc->sc_bustag;
bus_space_handle_t tr = sc->sc_tr;
- u_int32_t v;
+ uint32_t v;
if (phy == BE_PHY_INTERNAL) {
v = ((bit & 1) << MGMT_PAL_INT_MDIO_SHIFT) |
- MGMT_PAL_OENAB | MGMT_PAL_EXT_MDIO;
+ MGMT_PAL_OENAB | MGMT_PAL_EXT_MDIO;
} else {
- v = ((bit & 1) << MGMT_PAL_EXT_MDIO_SHIFT)
- | MGMT_PAL_OENAB | MGMT_PAL_INT_MDIO;
+ v = ((bit & 1) << MGMT_PAL_EXT_MDIO_SHIFT) |
+ MGMT_PAL_OENAB | MGMT_PAL_INT_MDIO;
}
bus_space_write_4(t, tr, BE_TRI_MGMTPAL, v);
(void)bus_space_read_4(t, tr, BE_TRI_MGMTPAL);
@@ -1325,7 +1314,7 @@
}
static void
-be_mii_sendbits(struct be_softc *sc, int phy, u_int32_t data, int nbits)
+be_mii_sendbits(struct be_softc *sc, int phy, uint32_t data, int nbits)
{
int i;
@@ -1349,17 +1338,17 @@
be_mii_sendbits(sc, phy, phy, 5);
be_mii_sendbits(sc, phy, reg, 5);
- (void) be_tcvr_read_bit(sc, phy);
- (void) be_tcvr_read_bit(sc, phy);
+ (void)be_tcvr_read_bit(sc, phy);
+ (void)be_tcvr_read_bit(sc, phy);
for (i = 15; i >= 0; i--)
val |= (be_tcvr_read_bit(sc, phy) << i);
- (void) be_tcvr_read_bit(sc, phy);
- (void) be_tcvr_read_bit(sc, phy);
- (void) be_tcvr_read_bit(sc, phy);
+ (void)be_tcvr_read_bit(sc, phy);
+ (void)be_tcvr_read_bit(sc, phy);
+ (void)be_tcvr_read_bit(sc, phy);
- return (val);
+ return val;
}
void
@@ -1390,8 +1379,7 @@
device_t self = sc->sc_dev;
int n;
- be_mii_writereg(self, phy, MII_BMCR,
- BMCR_LOOP | BMCR_PDOWN | BMCR_ISO);
+ be_mii_writereg(self, phy, MII_BMCR, BMCR_LOOP | BMCR_PDOWN | BMCR_ISO);
be_mii_writereg(self, phy, MII_BMCR, BMCR_RESET);
for (n = 16; n >= 0; n--) {
@@ -1402,10 +1390,10 @@
}
if (n == 0) {
aprint_error_dev(self, "bmcr reset failed\n");
- return (EIO);
+ return EIO;
}
- return (0);
+ return 0;
}
void
@@ -1427,8 +1415,8 @@
struct be_softc *sc = device_private(self);
bus_space_tag_t t = sc->sc_bustag;
bus_space_handle_t br = sc->sc_br;
- u_int instance;
- u_int32_t v;
+ uint instance;
+ uint32_t v;
instance = IFM_INST(sc->sc_mii.mii_media.ifm_cur->ifm_media);
#ifdef DIAGNOSTIC
@@ -1461,7 +1449,6 @@
ifmr->ifm_status = sc->sc_mii.mii_media_status;
ifmr->ifm_active = sc->sc_mii.mii_media_active;
- return;
}
/*
@@ -1478,7 +1465,7 @@
else if (error != 0)
return error;
- return (be_intphy_service(sc, &sc->sc_mii, MII_MEDIACHG));
+ return be_intphy_service(sc, &sc->sc_mii, MII_MEDIACHG);
}
/*
@@ -1498,7 +1485,7 @@
* If we're not polling our PHY instance, just return.
*/
if (IFM_INST(ife->ifm_media) != sc->sc_mii_inst)
- return (0);
+ return 0;
break;
@@ -1514,12 +1501,12 @@
BE_PHY_INTERNAL, MII_BMCR, bmcr | BMCR_ISO);
sc->sc_mii_flags &= ~MIIF_HAVELINK;
sc->sc_intphy_curspeed = 0;
- return (0);
+ return 0;
}
if ((error = be_mii_reset(sc, BE_PHY_INTERNAL)) != 0)
- return (error);
+ return error;
bmcr = be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMCR);
@@ -1554,15 +1541,15 @@
* If we're not currently selected, just return.
*/
if (IFM_INST(ife->ifm_media) != sc->sc_mii_inst)
- return (0);
+ return 0;
/* Only used for automatic media selection */
if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
- return (0);
+ return 0;
/* Is the interface even up? */
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
- return (0);
+ return 0;
/*
* Check link status; if we don't have a link, try another
@@ -1571,8 +1558,9 @@
*/
/* Read twice in case the register is latched */
- bmsr = be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMSR) |
- be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMSR);
+ bmsr =
+ be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMSR) |
+ be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMSR);
if ((bmsr & BMSR_LINK) != 0) {
/* We have a carrier */
@@ -1594,7 +1582,7 @@
device_xname(self),
(bmcr & BMCR_S100) ? "100" : "10");
}
- return (0);
+ return 0;
}
if ((sc->sc_mii_flags & MIIF_DOINGAUTO) == 0) {
@@ -1606,7 +1594,7 @@
/* Only retry autonegotiation every 5 seconds. */
if (++sc->sc_mii_ticks < 5)
- return(0);
+ return 0;
sc->sc_mii_ticks = 0;
bmcr = be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMCR);
@@ -1621,7 +1609,7 @@
bmcr = be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMCR);
be_mii_writereg(self,
BE_PHY_INTERNAL, MII_BMCR, bmcr | BMCR_ISO);
- return (0);
+ return 0;
}
/* Update the media status. */
@@ -1632,7 +1620,7 @@
(*mii->mii_statchg)(self);
sc->sc_mii_active = mii->mii_media_active;
}
- return (0);
+ return 0;
}
/*
@@ -1670,8 +1658,9 @@
}
/* Read twice in case the register is latched */
- bmsr = be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMSR)|
- be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMSR);
+ bmsr =
+ be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMSR) |
+ be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMSR);
if (bmsr & BMSR_LINK)
media_status |= IFM_ACTIVE;
