Module Name: src
Committed By: mrg
Date: Mon Nov 30 01:45:05 UTC 2009
Modified Files:
src/sys/arch/sparc64/include: pmap.h
src/sys/arch/sparc64/sparc64: ipifuncs.c locore.s
Log Message:
delete some no longer used code:
- smp_tlb_flush_ctx()
- smp_tlb_flush_all()
- sparc64_ipi_flush_ctx()
- sparc64_ipi_flush_all()
- sp_tlb_flush_ctx()
To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/sparc64/include/pmap.h
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/sparc64/sparc64/ipifuncs.c
cvs rdiff -u -r1.296 -r1.297 src/sys/arch/sparc64/sparc64/locore.s
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sparc64/include/pmap.h
diff -u src/sys/arch/sparc64/include/pmap.h:1.44 src/sys/arch/sparc64/include/pmap.h:1.45
--- src/sys/arch/sparc64/include/pmap.h:1.44 Fri Dec 12 18:16:58 2008
+++ src/sys/arch/sparc64/include/pmap.h Mon Nov 30 01:45:04 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.44 2008/12/12 18:16:58 pooka Exp $ */
+/* $NetBSD: pmap.h,v 1.45 2009/11/30 01:45:04 mrg Exp $ */
/*-
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -212,15 +212,9 @@
#ifdef MULTIPROCESSOR
void smp_tlb_flush_pte(vaddr_t, pmap_t);
-void smp_tlb_flush_ctx(pmap_t);
-void smp_tlb_flush_all(void);
#define tlb_flush_pte(va,pm) smp_tlb_flush_pte(va, pm)
-#define tlb_flush_ctx(pm) smp_tlb_flush_ctx(pm)
-#define tlb_flush_all() smp_tlb_flush_all()
#else
#define tlb_flush_pte(va,pm) sp_tlb_flush_pte(va, (pm)->pm_ctx)
-#define tlb_flush_ctx(pm) sp_tlb_flush_ctx((pm)->pm_ctx)
-#define tlb_flush_all() sp_tlb_flush_all()
#endif
/* Installed physical memory, as discovered during bootstrap. */
Index: src/sys/arch/sparc64/sparc64/ipifuncs.c
diff -u src/sys/arch/sparc64/sparc64/ipifuncs.c:1.24 src/sys/arch/sparc64/sparc64/ipifuncs.c:1.25
--- src/sys/arch/sparc64/sparc64/ipifuncs.c:1.24 Sat May 16 19:15:34 2009
+++ src/sys/arch/sparc64/sparc64/ipifuncs.c Mon Nov 30 01:45:04 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: ipifuncs.c,v 1.24 2009/05/16 19:15:34 nakayama Exp $ */
+/* $NetBSD: ipifuncs.c,v 1.25 2009/11/30 01:45:04 mrg Exp $ */
/*-
* Copyright (c) 2004 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.24 2009/05/16 19:15:34 nakayama Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.25 2009/11/30 01:45:04 mrg Exp $");
#include "opt_ddb.h"
@@ -364,55 +364,6 @@
}
/*
- * Flush context on all active processors.
- */
-void
-smp_tlb_flush_ctx(pmap_t pm)
-{
- sparc64_cpuset_t cpuset;
- struct cpu_info *ci;
- int ctx;
- bool kpm = (pm == pmap_kernel());
-
- /* Flush our own TLB */
- ctx = pm->pm_ctx[cpu_number()];
- KASSERT(ctx >= 0);
- if (kpm || ctx > 0)
- sp_tlb_flush_ctx(ctx);
-
- CPUSET_ASSIGN(cpuset, cpus_active);
- CPUSET_DEL(cpuset, cpu_number());
- if (CPUSET_EMPTY(cpuset))
- return;
-
- /* Flush others */
- for (ci = cpus; ci != NULL; ci = ci->ci_next) {
- if (CPUSET_HAS(cpuset, ci->ci_index)) {
- CPUSET_DEL(cpuset, ci->ci_index);
- ctx = pm->pm_ctx[ci->ci_index];
- KASSERT(ctx >= 0);
- if (!kpm && ctx == 0)
- continue;
- sparc64_send_ipi(ci->ci_cpuid, sparc64_ipi_flush_ctx,
- ctx, 0);
- }
- }
-}
-
-/*
- * Flush whole TLB on all active processors.
- */
-void
-smp_tlb_flush_all(void)
-{
- /* Flush our own TLB */
- sp_tlb_flush_all();
-
- /* Flush others */
- sparc64_broadcast_ipi(sparc64_ipi_flush_all, 0, 0);
-}
-
-/*
* Print an error message.
*/
void
Index: src/sys/arch/sparc64/sparc64/locore.s
diff -u src/sys/arch/sparc64/sparc64/locore.s:1.296 src/sys/arch/sparc64/sparc64/locore.s:1.297
--- src/sys/arch/sparc64/sparc64/locore.s:1.296 Sun Nov 29 03:31:33 2009
+++ src/sys/arch/sparc64/sparc64/locore.s Mon Nov 30 01:45:04 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.296 2009/11/29 03:31:33 nakayama Exp $ */
+/* $NetBSD: locore.s,v 1.297 2009/11/30 01:45:04 mrg Exp $ */
/*
* Copyright (c) 1996-2002 Eduardo Horvath
@@ -3823,95 +3823,6 @@
ba,a ret_from_intr_vector
nop
-/*
- * IPI handler to flush single context.
- * void sparc64_ipi_flush_ctx(void *);
- *
- * On entry:
- * %g2 = int ctx
- */
-ENTRY(sparc64_ipi_flush_ctx)
-#if KTR_COMPILE & KTR_PMAP
- CATR(KTR_TRAP, "sparc64_ipi_flush_ctx:",
- %g1, %g3, %g4, 10, 11, 12)
-12:
-#endif
-#ifdef SPITFIRE
- mov CTX_SECONDARY, %g5
- ldxa [%g5] ASI_DMMU, %g6 ! Save secondary context
- sethi %hi(KERNBASE), %g7
- membar #LoadStore
- stxa %g2, [%g5] ASI_DMMU ! Insert context to demap
- set DEMAP_CTX_SECONDARY, %g3
- membar #Sync
- stxa %g3, [%g3] ASI_DMMU_DEMAP ! Do the demap
- stxa %g3, [%g3] ASI_IMMU_DEMAP ! Do the demap
- flush %g7
- stxa %g6, [%g5] ASI_DMMU ! Restore secondary context
- membar #Sync
- IPIEVC_INC(IPI_EVCNT_TLB_CTX,%g2,%g3)
-#else
- WRITEME
-#endif
-
- ba,a ret_from_intr_vector
- nop
-
-/*
- * IPI handler to flush the whole TLB.
- * void sparc64_ipi_flush_all(void *);
- */
-ENTRY(sparc64_ipi_flush_all)
-#if KTR_COMPILE & KTR_PMAP
- CATR(KTR_TRAP, "sparc64_ipi_flush_all: %p %p",
- %g1, %g4, %g5, 10, 11, 12)
- stx %g3, [%g1 + KTR_PARM1]
- stx %g2, [%g1 + KTR_PARM2]
-12:
-#endif
-
- set (63 * 8), %g1 ! last TLB entry
- membar #Sync
-
- ! %g1 = loop counter
- ! %g2 = TLB data value
-
-0:
- ldxa [%g1] ASI_DMMU_TLB_DATA, %g2 ! fetch the TLB data
- btst TTE_L, %g2 ! locked entry?
- bnz,pt %icc, 1f ! if so, skip
- nop
-
- stxa %g0, [%g1] ASI_DMMU_TLB_DATA ! zap it
- membar #Sync
-
-1:
- dec 8, %g1
- brgz,pt %g1, 0b ! loop over all entries
- nop
-
- set (63 * 8), %g1 ! last TLB entry
-
-0:
- ldxa [%g1] ASI_IMMU_TLB_DATA, %g2 ! fetch the TLB data
- btst TTE_L, %g2 ! locked entry?
- bnz,pt %icc, 1f ! if so, skip
- nop
-
- stxa %g0, [%g1] ASI_IMMU_TLB_DATA ! zap it
- membar #Sync
-
-1:
- dec 8, %g1
- brgz,pt %g1, 0b ! loop over all entries
- nop
-
- sethi %hi(KERNBASE), %g4
- membar #Sync
- flush %g4
-
- ba,a ret_from_intr_vector
- nop
/*
* Secondary CPU bootstrap code.
@@ -5531,96 +5442,6 @@
wrpr %g0, %o3, %tl ! Return to kernel mode.
#endif
-/*
- * sp_tlb_flush_ctx(int ctx)
- *
- * Flush entire context from both IMMU and DMMU.
- *
- * This uses %o0-%o5
- */
- .align 8
-ENTRY(sp_tlb_flush_ctx)
-#ifdef DEBUG
- set DATA_START, %o4 ! Forget any recent TLB misses
- stx %g0, [%o4]
-#endif
-#ifdef NOTDEF_DEBUG
- save %sp, -CC64FSZ, %sp
- set 1f, %o0
- call printf
- mov %i0, %o1
- restore
- .data
-1:
- .asciz "sp_tlb_flush_ctx: context flush of %d attempted\r\n"
- _ALIGN
- .text
-#endif
-#ifdef DIAGNOSTIC
- brnz,pt %o0, 2f
- nop
- set 1f, %o0
- call panic
- nop
- .data
-1:
- .asciz "sp_tlb_flush_ctx: attempted demap of NUCLEUS context\r\n"
- _ALIGN
- .text
-2:
-#endif
-#ifdef SPITFIRE
-#ifdef MULTIPROCESSOR
- rdpr %pstate, %o3
- andn %o3, PSTATE_IE, %o4 ! disable interrupts
- wrpr %o4, 0, %pstate
-#endif
- mov CTX_SECONDARY, %o2
- ldxa [%o2] ASI_DMMU, %o1 ! Save secondary context
- sethi %hi(KERNBASE), %o4
- membar #LoadStore
- stxa %o0, [%o2] ASI_DMMU ! Insert context to demap
- set DEMAP_CTX_SECONDARY, %o5
- membar #Sync
- stxa %o5, [%o5] ASI_DMMU_DEMAP ! Do the demap
- stxa %o5, [%o5] ASI_IMMU_DEMAP ! Do the demap
- flush %o4
- stxa %o1, [%o2] ASI_DMMU ! Restore secondary context
- membar #Sync
- retl
-#ifdef MULTIPROCESSOR
- wrpr %o3, %pstate ! restore interrupts
-#else
- nop
-#endif
-#else
-#ifdef MULTIPROCESSOR
- WRITEME
-#endif
- rdpr %tl, %o3
- mov CTX_PRIMARY, %o2
- brnz %o3, 1f
- sethi %hi(KERNBASE), %o4
- wrpr %g0, 1, %tl
-1:
- ldxa [%o2] ASI_DMMU, %o1 ! Save secondary context
- membar #LoadStore
- stxa %o0, [%o2] ASI_DMMU ! Insert context to demap
- membar #Sync
- set DEMAP_CTX_PRIMARY, %o5
- stxa %o5, [%o5] ASI_DMMU_DEMAP ! Do the demap
- stxa %o5, [%o5] ASI_IMMU_DEMAP ! Do the demap
- membar #Sync
- stxa %o1, [%o2] ASI_DMMU ! Restore secondary asi
- membar #Sync
- brz,pt %o3, 1f
- flush %o4
- retl
- nop
-1:
- retl
- wrpr %g0, %o3, %tl ! Return to kernel mode.
-#endif
/*
* sp_tlb_flush_all(void)
