Module Name: src
Committed By: mrg
Date: Mon Feb 1 07:01:41 UTC 2010
Modified Files:
src/sys/arch/sparc64/include: pmap.h
src/sys/arch/sparc64/sparc64: ipifuncs.c locore.s pmap.c
Log Message:
- sp_tlb_flush_all() becomes sp_tlb_flush_all_us() and sp_tlb_flush_all_usiii()
- sparc64_ipi_flush_pte() becomes sparc64_ipi_flush_pte_us() and
sparc64_ipi_flush_pte_usiii()
- add some commented out code to disable interrupts and raise the traplevel
in sparc64_ipi_flush_pte_usiii()
- cache_flush_phys() was missing a little of code in the cheetah case
To generate a diff of this commit:
cvs rdiff -u -r1.45 -r1.46 src/sys/arch/sparc64/include/pmap.h
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/sparc64/sparc64/ipifuncs.c
cvs rdiff -u -r1.307 -r1.308 src/sys/arch/sparc64/sparc64/locore.s
cvs rdiff -u -r1.247 -r1.248 src/sys/arch/sparc64/sparc64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sparc64/include/pmap.h
diff -u src/sys/arch/sparc64/include/pmap.h:1.45 src/sys/arch/sparc64/include/pmap.h:1.46
--- src/sys/arch/sparc64/include/pmap.h:1.45 Mon Nov 30 01:45:04 2009
+++ src/sys/arch/sparc64/include/pmap.h Mon Feb 1 07:01:41 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.45 2009/11/30 01:45:04 mrg Exp $ */
+/* $NetBSD: pmap.h,v 1.46 2010/02/01 07:01:41 mrg Exp $ */
/*-
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -208,7 +208,8 @@
/* Assembly routines to flush TLB mappings */
void sp_tlb_flush_pte(vaddr_t, int);
void sp_tlb_flush_ctx(int);
-void sp_tlb_flush_all(void);
+void sp_tlb_flush_all_us(void);
+void sp_tlb_flush_all_usiii(void);
#ifdef MULTIPROCESSOR
void smp_tlb_flush_pte(vaddr_t, pmap_t);
Index: src/sys/arch/sparc64/sparc64/ipifuncs.c
diff -u src/sys/arch/sparc64/sparc64/ipifuncs.c:1.28 src/sys/arch/sparc64/sparc64/ipifuncs.c:1.29
--- src/sys/arch/sparc64/sparc64/ipifuncs.c:1.28 Mon Feb 1 05:00:59 2010
+++ src/sys/arch/sparc64/sparc64/ipifuncs.c Mon Feb 1 07:01:40 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: ipifuncs.c,v 1.28 2010/02/01 05:00:59 mrg Exp $ */
+/* $NetBSD: ipifuncs.c,v 1.29 2010/02/01 07:01:40 mrg Exp $ */
/*-
* Copyright (c) 2004 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.28 2010/02/01 05:00:59 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.29 2010/02/01 07:01:40 mrg Exp $");
#include "opt_ddb.h"
@@ -66,7 +66,8 @@
*/
void sparc64_ipi_halt(void *);
void sparc64_ipi_pause(void *);
-void sparc64_ipi_flush_pte(void *);
+void sparc64_ipi_flush_pte_us(void *);
+void sparc64_ipi_flush_pte_usiii(void *);
/*
* Process cpu stop-self event.
@@ -349,6 +350,12 @@
struct cpu_info *ci;
int ctx;
bool kpm = (pm == pmap_kernel());
+ ipifunc_t func;
+
+ if (CPU_IS_USIII_UP())
+ func = sparc64_ipi_flush_pte_usiii;
+ else
+ func = sparc64_ipi_flush_pte_us;
/* Flush our own TLB */
ctx = pm->pm_ctx[cpu_number()];
@@ -369,8 +376,7 @@
KASSERT(ctx >= 0);
if (!kpm && ctx == 0)
continue;
- sparc64_send_ipi(ci->ci_cpuid, sparc64_ipi_flush_pte,
- va, ctx);
+ sparc64_send_ipi(ci->ci_cpuid, func, va, ctx);
}
}
}
Index: src/sys/arch/sparc64/sparc64/locore.s
diff -u src/sys/arch/sparc64/sparc64/locore.s:1.307 src/sys/arch/sparc64/sparc64/locore.s:1.308
--- src/sys/arch/sparc64/sparc64/locore.s:1.307 Mon Feb 1 06:26:15 2010
+++ src/sys/arch/sparc64/sparc64/locore.s Mon Feb 1 07:01:40 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.307 2010/02/01 06:26:15 mrg Exp $ */
+/* $NetBSD: locore.s,v 1.308 2010/02/01 07:01:40 mrg Exp $ */
/*
* Copyright (c) 1996-2002 Eduardo Horvath
@@ -3575,19 +3575,19 @@
/*
* IPI handler to flush single pte.
- * void sparc64_ipi_flush_pte(void *);
+ * void sparc64_ipi_flush_pte_us(void *);
+ * void sparc64_ipi_flush_pte_usiii(void *);
*
* On entry:
* %g2 = vaddr_t va
* %g3 = int ctx
*/
-ENTRY(sparc64_ipi_flush_pte)
+ENTRY(sparc64_ipi_flush_pte_us)
#if KTR_COMPILE & KTR_PMAP
- CATR(KTR_TRAP, "sparc64_ipi_flush_pte:",
+ CATR(KTR_TRAP, "sparc64_ipi_flush_pte_us:",
%g1, %g3, %g4, 10, 11, 12)
12:
#endif
-#ifdef SPITFIRE
srlx %g2, PG_SHIFT4U, %g2 ! drop unused va bits
mov CTX_SECONDARY, %g5
sllx %g2, PG_SHIFT4U, %g2
@@ -3608,7 +3608,22 @@
stxa %g6, [%g5] ASI_DMMU ! Restore secondary context
membar #Sync
IPIEVC_INC(IPI_EVCNT_TLB_PTE,%g2,%g3)
-#else
+
+ ba,a ret_from_intr_vector
+ nop
+
+ENTRY(sparc64_ipi_flush_pte_usiii)
+#if 0
+ rdpr %pstate, %g1
+ andn %g1, PSTATE_IE, %g4
+ wrpr %g4, %pstate
+
+ rdpr %tl, %g4
+ brnz %g4, 1f
+ add %g4, 1, %g5
+ wrpr %g5, %tl
+1:
+#endif
andn %g2, 0xfff, %g2 ! drop unused va bits
mov CTX_PRIMARY, %g5
ldxa [%g5] ASI_DMMU, %g6 ! Save secondary context
@@ -3624,10 +3639,16 @@
stxa %g2, [%g2] ASI_DMMU_DEMAP ! Do the demap
stxa %g2, [%g2] ASI_IMMU_DEMAP ! Do the demap
#endif
+ membar #Sync
flush %g7
stxa %g6, [%g5] ASI_DMMU ! Restore primary context
membar #Sync
+ flush %g7
IPIEVC_INC(IPI_EVCNT_TLB_PTE,%g2,%g3)
+
+#if 0
+ wrpr %g4, %tl
+ wrpr %g1, %pstate
#endif
ba,a ret_from_intr_vector
@@ -5250,13 +5271,13 @@
/*
- * sp_tlb_flush_all(void)
+ * sp_tlb_flush_all_us(void)/sp_tlb_flush_all_usiii(void)
*
* Flush all user TLB entries from both IMMU and DMMU.
+ * We have both UltraSPARC I+II, and UltraSPARC >=III versions.
*/
.align 8
-ENTRY(sp_tlb_flush_all)
-#ifdef SPITFIRE
+ENTRY(sp_tlb_flush_all_us)
rdpr %pstate, %o3
andn %o3, PSTATE_IE, %o4 ! disable interrupts
wrpr %o4, 0, %pstate
@@ -5321,7 +5342,9 @@
flush %o4
retl
wrpr %o3, %pstate
-#else
+
+ .align 8
+ENTRY(sp_tlb_flush_all_usiii)
rdpr %tl, %o5
brnz,pt %o5, 1f
set DEMAP_ALL, %o2
@@ -5341,7 +5364,6 @@
wrpr %o5, %tl
retl
wrpr %o3, %pstate
-#endif
/*
* blast_dcache()
@@ -5477,7 +5499,7 @@
dec %o1
!!
- !! Both D$ and I$ tags match pa bits 40-13, but
+ !! Both D$ and I$ tags match pa bits 42-13, but
!! they are shifted different amounts. So we'll
!! generate a mask for bits 40-13.
!!
@@ -5516,10 +5538,15 @@
bgt,pt %xcc, 3f
nop
stxa %g0, [%o4] ASI_ICACHE_TAG
-3:
#else
+ cmp %o0, %o3
+ blt,pt %xcc, 3f
+ cmp %o1, %o3
+ bgt,pt %xcc, 3f
+ nop
stxa %g0, [%o4] ASI_DCACHE_INVALIDATE ! Just right
#endif
+3:
membar #StoreLoad
dec 32, %o5
brgz,pt %o5, 1b
Index: src/sys/arch/sparc64/sparc64/pmap.c
diff -u src/sys/arch/sparc64/sparc64/pmap.c:1.247 src/sys/arch/sparc64/sparc64/pmap.c:1.248
--- src/sys/arch/sparc64/sparc64/pmap.c:1.247 Mon Feb 1 02:42:33 2010
+++ src/sys/arch/sparc64/sparc64/pmap.c Mon Feb 1 07:01:40 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.247 2010/02/01 02:42:33 mrg Exp $ */
+/* $NetBSD: pmap.c,v 1.248 2010/02/01 07:01:40 mrg Exp $ */
/*
*
* Copyright (C) 1996-1999 Eduardo Horvath.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.247 2010/02/01 02:42:33 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.248 2010/02/01 07:01:40 mrg Exp $");
#undef NO_VCACHE /* Don't forget the locked TLB in dostart */
#define HWREF
@@ -3066,7 +3066,10 @@
clrx(&curcpu()->ci_tsb_immu[i].data);
}
}
- sp_tlb_flush_all();
+ if (CPU_IS_USIII_UP())
+ sp_tlb_flush_all_usiii();
+ else
+ sp_tlb_flush_all_us();
ctx = 1;
curcpu()->ci_pmap_next_ctx = 2;
}
