Module Name: src
Committed By: isaki
Date: Tue Feb 26 10:01:41 UTC 2019
Modified Files:
src/distrib/sets/lists/debug: mi
src/distrib/sets/lists/tests: mi
src/tests/lib/libc/atomic: Makefile
src/tests/lib/libc/sync: Makefile
Added Files:
src/tests/lib/libc/atomic: t___sync_add.c t___sync_and.c
t___sync_compare_and_swap.c t___sync_lock.c t___sync_nand.c
t___sync_or.c t___sync_sub.c t___sync_xor.c
Removed Files:
src/tests/lib/libc/sync: all_sync_ops_linkable.c
Log Message:
Add ATF tests for __sync_* functions instead of all_sync_ops_linkable.c
To generate a diff of this commit:
cvs rdiff -u -r1.277 -r1.278 src/distrib/sets/lists/debug/mi
cvs rdiff -u -r1.808 -r1.809 src/distrib/sets/lists/tests/mi
cvs rdiff -u -r1.1 -r1.2 src/tests/lib/libc/atomic/Makefile
cvs rdiff -u -r0 -r1.1 src/tests/lib/libc/atomic/t___sync_add.c \
src/tests/lib/libc/atomic/t___sync_and.c \
src/tests/lib/libc/atomic/t___sync_compare_and_swap.c \
src/tests/lib/libc/atomic/t___sync_lock.c \
src/tests/lib/libc/atomic/t___sync_nand.c \
src/tests/lib/libc/atomic/t___sync_or.c \
src/tests/lib/libc/atomic/t___sync_sub.c \
src/tests/lib/libc/atomic/t___sync_xor.c
cvs rdiff -u -r1.7 -r1.8 src/tests/lib/libc/sync/Makefile
cvs rdiff -u -r1.4 -r0 src/tests/lib/libc/sync/all_sync_ops_linkable.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/distrib/sets/lists/debug/mi
diff -u src/distrib/sets/lists/debug/mi:1.277 src/distrib/sets/lists/debug/mi:1.278
--- src/distrib/sets/lists/debug/mi:1.277 Mon Feb 18 00:42:55 2019
+++ src/distrib/sets/lists/debug/mi Tue Feb 26 10:01:40 2019
@@ -1,4 +1,4 @@
-# $NetBSD: mi,v 1.277 2019/02/18 00:42:55 rin Exp $
+# $NetBSD: mi,v 1.278 2019/02/26 10:01:40 isaki Exp $
./etc/mtree/set.debug comp-sys-root
./usr/lib comp-sys-usr compatdir
./usr/lib/i18n/libBIG5_g.a comp-c-debuglib debuglib,compatfile
@@ -1889,6 +1889,14 @@
./usr/libdata/debug/usr/tests/lib/libbpfjit/t_bpfjit.debug tests-lib-debug debug,atf,sljit,compattestfile
./usr/libdata/debug/usr/tests/lib/libbpfjit/t_cop.debug tests-lib-debug debug,atf,sljit,compattestfile
./usr/libdata/debug/usr/tests/lib/libbpfjit/t_extmem.debug tests-lib-debug debug,atf,sljit,compattestfile
+./usr/libdata/debug/usr/tests/lib/libc/atomic/t___sync_add.debug tests-lib-tests debug,atf,compattestfile
+./usr/libdata/debug/usr/tests/lib/libc/atomic/t___sync_and.debug tests-lib-tests debug,atf,compattestfile
+./usr/libdata/debug/usr/tests/lib/libc/atomic/t___sync_compare_and_swap.debug tests-lib-tests debug,atf,compattestfile
+./usr/libdata/debug/usr/tests/lib/libc/atomic/t___sync_lock.debug tests-lib-tests debug,atf,compattestfile
+./usr/libdata/debug/usr/tests/lib/libc/atomic/t___sync_nand.debug tests-lib-tests debug,atf,compattestfile
+./usr/libdata/debug/usr/tests/lib/libc/atomic/t___sync_or.debug tests-lib-tests debug,atf,compattestfile
+./usr/libdata/debug/usr/tests/lib/libc/atomic/t___sync_sub.debug tests-lib-tests debug,atf,compattestfile
+./usr/libdata/debug/usr/tests/lib/libc/atomic/t___sync_xor.debug tests-lib-tests debug,atf,compattestfile
./usr/libdata/debug/usr/tests/lib/libc/atomic/t_atomic_add.debug tests-lib-debug debug,atf,compattestfile
./usr/libdata/debug/usr/tests/lib/libc/atomic/t_atomic_and.debug tests-lib-debug debug,atf,compattestfile
./usr/libdata/debug/usr/tests/lib/libc/atomic/t_atomic_cas.debug tests-lib-debug debug,atf,compattestfile
Index: src/distrib/sets/lists/tests/mi
diff -u src/distrib/sets/lists/tests/mi:1.808 src/distrib/sets/lists/tests/mi:1.809
--- src/distrib/sets/lists/tests/mi:1.808 Mon Feb 18 00:42:55 2019
+++ src/distrib/sets/lists/tests/mi Tue Feb 26 10:01:40 2019
@@ -1,4 +1,4 @@
-# $NetBSD: mi,v 1.808 2019/02/18 00:42:55 rin Exp $
+# $NetBSD: mi,v 1.809 2019/02/26 10:01:40 isaki Exp $
#
# Note: don't delete entries from here - mark them as "obsolete" instead.
#
@@ -2445,6 +2445,14 @@
./usr/tests/lib/libc/Kyuafile tests-lib-tests compattestfile,atf,kyua
./usr/tests/lib/libc/atomic tests-lib-tests compattestfile,atf
./usr/tests/lib/libc/atomic/Atffile tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t___sync_add tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t___sync_and tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t___sync_compare_and_swap tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t___sync_lock tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t___sync_nand tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t___sync_or tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t___sync_sub tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t___sync_xor tests-lib-tests compattestfile,atf
./usr/tests/lib/libc/atomic/t_atomic_add tests-lib-tests compattestfile,atf
./usr/tests/lib/libc/atomic/t_atomic_and tests-lib-tests compattestfile,atf
./usr/tests/lib/libc/atomic/t_atomic_cas tests-lib-tests compattestfile,atf
Index: src/tests/lib/libc/atomic/Makefile
diff -u src/tests/lib/libc/atomic/Makefile:1.1 src/tests/lib/libc/atomic/Makefile:1.2
--- src/tests/lib/libc/atomic/Makefile:1.1 Sun Feb 17 12:24:17 2019
+++ src/tests/lib/libc/atomic/Makefile Tue Feb 26 10:01:41 2019
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.1 2019/02/17 12:24:17 isaki Exp $
+# $NetBSD: Makefile,v 1.2 2019/02/26 10:01:41 isaki Exp $
.include <bsd.own.mk>
@@ -12,6 +12,23 @@ TESTS_C+= t_atomic_inc
TESTS_C+= t_atomic_or
TESTS_C+= t_atomic_swap
+TESTS_C+= t___sync_add
+TESTS_C+= t___sync_sub
+TESTS_C+= t___sync_or
+TESTS_C+= t___sync_and
+TESTS_C+= t___sync_xor
+TESTS_C+= t___sync_nand
+TESTS_C+= t___sync_compare_and_swap
+TESTS_C+= t___sync_lock
+
+# The code conforms to new NAND semantics. So this warning is not
+# necessary here.
+.if "${ACTIVE_CC}" == "gcc"
+CPPFLAGS.t___sync_nand.c+= -Wno-sync-nand
+.elif "${ACTIVE_CC}" == "clang"
+CPPFLAGS.t___sync_nand.c+= -Wno-sync-fetch-and-nand-semantics-changed
+.endif
+
MKMAN=no
BINDIR= ${TESTSDIR}
Index: src/tests/lib/libc/sync/Makefile
diff -u src/tests/lib/libc/sync/Makefile:1.7 src/tests/lib/libc/sync/Makefile:1.8
--- src/tests/lib/libc/sync/Makefile:1.7 Wed Feb 22 12:34:49 2017
+++ src/tests/lib/libc/sync/Makefile Tue Feb 26 10:01:41 2019
@@ -1,12 +1,10 @@
-# $NetBSD: Makefile,v 1.7 2017/02/22 12:34:49 maya Exp $
+# $NetBSD: Makefile,v 1.8 2019/02/26 10:01:41 isaki Exp $
WARNS=0
NOMAN=1
.include <bsd.own.mk>
-PROG= all_sync_ops_linkable
-
.if "${ACTIVE_CC}" == "clang"
CXXFLAGS+= -std=c++11
PROG_CXX+= cpp_atomic_ops_linkable
Added files:
Index: src/tests/lib/libc/atomic/t___sync_add.c
diff -u /dev/null src/tests/lib/libc/atomic/t___sync_add.c:1.1
--- /dev/null Tue Feb 26 10:01:41 2019
+++ src/tests/lib/libc/atomic/t___sync_add.c Tue Feb 26 10:01:41 2019
@@ -0,0 +1,128 @@
+/* $NetBSD: t___sync_add.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
+
+/*
+ * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD: t___sync_add.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
+
+#include <atf-c.h>
+#include <inttypes.h>
+#include <machine/types.h> // for __HAVE_ATOMIC64_OPS
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+/* XXX
+ * Depending on a combination of arch and compiler, __sync_* is
+ * implemented as compiler's builtin function. In that case, even
+ * if libc exports the function symbol, it is not used. As a result
+ * this tests will examine compiler's builtin functions.
+ * It's better to run only when target is actually in libc.
+ */
+
+#define DST (0x1122334455667788UL)
+#define SRC (0xf0e0d0c0b0a09081UL)
+#define EXPECT (0x0203040506070809UL)
+
+#define atf_sync_prefetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE expval; \
+ TYPE expres; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ expval = (TYPE)EXPECT; \
+ expres = (TYPE)DST; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
+}
+
+atf_sync_prefetch(__sync_fetch_and_add_1, uint8_t, PRIx8);
+atf_sync_prefetch(__sync_fetch_and_add_2, uint16_t, PRIx16);
+atf_sync_prefetch(__sync_fetch_and_add_4, uint32_t, PRIx32);
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_sync_prefetch(__sync_fetch_and_add_8, uint64_t, PRIx64);
+#endif
+
+#define atf_sync_postfetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE exp; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ exp = (TYPE)EXPECT; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
+}
+
+atf_sync_postfetch(__sync_add_and_fetch_1, uint8_t, PRIx8);
+atf_sync_postfetch(__sync_add_and_fetch_2, uint16_t, PRIx16);
+atf_sync_postfetch(__sync_add_and_fetch_4, uint32_t, PRIx32);
+#ifdef __HAVE_ATOMIC64_OPS
+atf_sync_postfetch(__sync_add_and_fetch_8, uint64_t, PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_add_1);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_add_2);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_add_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_add_8);
+#endif
+
+ ATF_TP_ADD_TC(tp, __sync_add_and_fetch_1);
+ ATF_TP_ADD_TC(tp, __sync_add_and_fetch_2);
+ ATF_TP_ADD_TC(tp, __sync_add_and_fetch_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_add_and_fetch_8);
+#endif
+
+ return atf_no_error();
+}
Index: src/tests/lib/libc/atomic/t___sync_and.c
diff -u /dev/null src/tests/lib/libc/atomic/t___sync_and.c:1.1
--- /dev/null Tue Feb 26 10:01:41 2019
+++ src/tests/lib/libc/atomic/t___sync_and.c Tue Feb 26 10:01:41 2019
@@ -0,0 +1,128 @@
+/* $NetBSD: t___sync_and.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
+
+/*
+ * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD: t___sync_and.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
+
+#include <atf-c.h>
+#include <inttypes.h>
+#include <machine/types.h> // for __HAVE_ATOMIC64_OPS
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+/* XXX
+ * Depending on a combination of arch and compiler, __sync_* is
+ * implemented as compiler's builtin function. In that case, even
+ * if libc exports the function symbol, it is not used. As a result
+ * this tests will examine compiler's builtin functions.
+ * It's better to run only when target is actually in libc.
+ */
+
+#define DST (0x1122334455667788UL)
+#define SRC (0xf0f0f0f0f0f0f0f0UL)
+#define EXPECT (0x1020304050607080UL)
+
+#define atf_sync_prefetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE expval; \
+ TYPE expres; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ expval = (TYPE)EXPECT; \
+ expres = (TYPE)DST; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
+}
+
+atf_sync_prefetch(__sync_fetch_and_and_1, uint8_t, PRIx8);
+atf_sync_prefetch(__sync_fetch_and_and_2, uint16_t, PRIx16);
+atf_sync_prefetch(__sync_fetch_and_and_4, uint32_t, PRIx32);
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_sync_prefetch(__sync_fetch_and_and_8, uint64_t, PRIx64);
+#endif
+
+#define atf_sync_postfetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE exp; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ exp = (TYPE)EXPECT; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
+}
+
+atf_sync_postfetch(__sync_and_and_fetch_1, uint8_t, PRIx8);
+atf_sync_postfetch(__sync_and_and_fetch_2, uint16_t, PRIx16);
+atf_sync_postfetch(__sync_and_and_fetch_4, uint32_t, PRIx32);
+#ifdef __HAVE_ATOMIC64_OPS
+atf_sync_postfetch(__sync_and_and_fetch_8, uint64_t, PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_and_1);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_and_2);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_and_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_and_8);
+#endif
+
+ ATF_TP_ADD_TC(tp, __sync_and_and_fetch_1);
+ ATF_TP_ADD_TC(tp, __sync_and_and_fetch_2);
+ ATF_TP_ADD_TC(tp, __sync_and_and_fetch_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_and_and_fetch_8);
+#endif
+
+ return atf_no_error();
+}
Index: src/tests/lib/libc/atomic/t___sync_compare_and_swap.c
diff -u /dev/null src/tests/lib/libc/atomic/t___sync_compare_and_swap.c:1.1
--- /dev/null Tue Feb 26 10:01:41 2019
+++ src/tests/lib/libc/atomic/t___sync_compare_and_swap.c Tue Feb 26 10:01:41 2019
@@ -0,0 +1,157 @@
+/* $NetBSD: t___sync_compare_and_swap.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
+
+/*
+ * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD: t___sync_compare_and_swap.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
+
+#include <atf-c.h>
+#include <inttypes.h>
+#include <machine/types.h> // for __HAVE_ATOMIC64_OPS
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+/* XXX
+ * Depending on a combination of arch and compiler, __sync_* is
+ * implemented as compiler's builtin function. In that case, even
+ * if libc exports the function symbol, it is not used. As a result
+ * this tests will examine compiler's builtin functions.
+ * It's better to run only when target is actually in libc.
+ */
+
+#define OLDVAL (0x1122334455667788UL)
+#define NEWVAL (0x8090a0b0c0d0e0f0UL)
+
+#define atf_sync_bool(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE oldval; \
+ TYPE newval; \
+ TYPE expval; \
+ bool expres; \
+ bool res; \
+ /* If successful */ \
+ val = (TYPE)OLDVAL; \
+ oldval = (TYPE)OLDVAL; \
+ newval = (TYPE)NEWVAL; \
+ expval = (TYPE)NEWVAL; \
+ expres = true; \
+ res = NAME(&val, oldval, newval); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "successful case: val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "successful case: res expects %d but %d", expres, res); \
+ /* If failure */ \
+ val = (TYPE)OLDVAL; \
+ oldval = (TYPE)(OLDVAL + 1); \
+ newval = (TYPE)NEWVAL; \
+ expval = (TYPE)OLDVAL; \
+ expres = false; \
+ res = NAME(&val, oldval, newval); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "failure case: val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "failure case: res expects %d but %d", expres, res); \
+}
+
+atf_sync_bool(__sync_bool_compare_and_swap_1, uint8_t, PRIx8);
+atf_sync_bool(__sync_bool_compare_and_swap_2, uint16_t, PRIx16);
+atf_sync_bool(__sync_bool_compare_and_swap_4, uint32_t, PRIx32);
+#ifdef __HAVE_ATOMIC64_OPS
+atf_sync_bool(__sync_bool_compare_and_swap_8, uint64_t, PRIx64);
+#endif
+
+#define atf_sync_val(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE oldval; \
+ TYPE newval; \
+ TYPE expval; \
+ TYPE expres; \
+ TYPE res; \
+ /* If successful */ \
+ val = (TYPE)OLDVAL; \
+ oldval = (TYPE)OLDVAL; \
+ newval = (TYPE)NEWVAL; \
+ expval = (TYPE)NEWVAL; \
+ expres = (TYPE)OLDVAL; \
+ res = NAME(&val, oldval, newval); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "successful case: val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "successful case: res expects 0x%" FMT " but 0x%" FMT, expres, res); \
+ /* If failure */ \
+ val = (TYPE)OLDVAL; \
+ oldval = (TYPE)(OLDVAL + 1); \
+ newval = (TYPE)NEWVAL; \
+ expval = (TYPE)OLDVAL; \
+ expres = (TYPE)OLDVAL; \
+ res = NAME(&val, oldval, newval); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "failure case: val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "failure case: res expects 0x%" FMT " but 0x%" FMT, expres, res); \
+}
+
+atf_sync_val(__sync_val_compare_and_swap_1, uint8_t, PRIx8);
+atf_sync_val(__sync_val_compare_and_swap_2, uint16_t, PRIx16);
+atf_sync_val(__sync_val_compare_and_swap_4, uint32_t, PRIx32);
+#ifdef __HAVE_ATOMIC64_OPS
+atf_sync_val(__sync_val_compare_and_swap_8, uint64_t, PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, __sync_bool_compare_and_swap_1);
+ ATF_TP_ADD_TC(tp, __sync_bool_compare_and_swap_2);
+ ATF_TP_ADD_TC(tp, __sync_bool_compare_and_swap_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_bool_compare_and_swap_8);
+#endif
+
+ ATF_TP_ADD_TC(tp, __sync_val_compare_and_swap_1);
+ ATF_TP_ADD_TC(tp, __sync_val_compare_and_swap_2);
+ ATF_TP_ADD_TC(tp, __sync_val_compare_and_swap_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_val_compare_and_swap_8);
+#endif
+
+ return atf_no_error();
+}
Index: src/tests/lib/libc/atomic/t___sync_lock.c
diff -u /dev/null src/tests/lib/libc/atomic/t___sync_lock.c:1.1
--- /dev/null Tue Feb 26 10:01:41 2019
+++ src/tests/lib/libc/atomic/t___sync_lock.c Tue Feb 26 10:01:41 2019
@@ -0,0 +1,137 @@
+/* $NetBSD: t___sync_lock.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
+
+/*
+ * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD: t___sync_lock.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
+
+#include <atf-c.h>
+#include <inttypes.h>
+#include <machine/types.h> // for __HAVE_ATOMIC64_OPS
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+/* XXX
+ * Depending on a combination of arch and compiler, __sync_* is
+ * implemented as compiler's builtin function. In that case, even
+ * if libc exports the function symbol, it is not used. As a result
+ * this tests will examine compiler's builtin functions.
+ * It's better to run only when target is actually in libc.
+ */
+
+#define OLDVAL (0x1122334455667788UL)
+#define NEWVAL (0x8090a0b0c0d0e0f0UL)
+
+#define atf_sync_tas(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE newval; \
+ TYPE expval; \
+ TYPE expres; \
+ TYPE res; \
+ val = (TYPE)OLDVAL; \
+ newval = (TYPE)NEWVAL; \
+ expval = (TYPE)NEWVAL; \
+ expres = (TYPE)OLDVAL; \
+ res = NAME(&val, newval); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
+}
+
+atf_sync_tas(__sync_lock_test_and_set_1, uint8_t, PRIx8);
+atf_sync_tas(__sync_lock_test_and_set_2, uint16_t, PRIx16);
+atf_sync_tas(__sync_lock_test_and_set_4, uint32_t, PRIx32);
+#ifdef __HAVE_ATOMIC64_OPS
+atf_sync_tas(__sync_lock_test_and_set_8, uint64_t, PRIx64);
+#endif
+
+#define atf_sync_rel(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE expval; \
+ val = (TYPE)OLDVAL; \
+ expval = (TYPE)0; \
+ NAME(&val); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+}
+
+atf_sync_rel(__sync_lock_release_1, uint8_t, PRIx8);
+atf_sync_rel(__sync_lock_release_2, uint16_t, PRIx16);
+atf_sync_rel(__sync_lock_release_4, uint32_t, PRIx32);
+#ifdef __HAVE_ATOMIC64_OPS
+atf_sync_rel(__sync_lock_release_8, uint64_t, PRIx64);
+#endif
+
+/*
+ * __sync_synchronize(): This is just a link-time test.
+ */
+ATF_TC(__sync_synchronize);
+ATF_TC_HEAD(__sync_synchronize, tc)
+{
+ atf_tc_set_md_var(tc, "descr", "__sync_synchronize");
+}
+ATF_TC_BODY(__sync_synchronize, tc)
+{
+ __sync_synchronize();
+}
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, __sync_lock_test_and_set_1);
+ ATF_TP_ADD_TC(tp, __sync_lock_test_and_set_2);
+ ATF_TP_ADD_TC(tp, __sync_lock_test_and_set_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_lock_test_and_set_8);
+#endif
+
+ ATF_TP_ADD_TC(tp, __sync_lock_release_1);
+ ATF_TP_ADD_TC(tp, __sync_lock_release_2);
+ ATF_TP_ADD_TC(tp, __sync_lock_release_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_lock_release_8);
+#endif
+
+ ATF_TP_ADD_TC(tp, __sync_synchronize);
+
+ return atf_no_error();
+}
Index: src/tests/lib/libc/atomic/t___sync_nand.c
diff -u /dev/null src/tests/lib/libc/atomic/t___sync_nand.c:1.1
--- /dev/null Tue Feb 26 10:01:41 2019
+++ src/tests/lib/libc/atomic/t___sync_nand.c Tue Feb 26 10:01:41 2019
@@ -0,0 +1,128 @@
+/* $NetBSD: t___sync_nand.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
+
+/*
+ * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD: t___sync_nand.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
+
+#include <atf-c.h>
+#include <inttypes.h>
+#include <machine/types.h> // for __HAVE_ATOMIC64_OPS
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+/* XXX
+ * Depending on a combination of arch and compiler, __sync_* is
+ * implemented as compiler's builtin function. In that case, even
+ * if libc exports the function symbol, it is not used. As a result
+ * this tests will examine compiler's builtin functions.
+ * It's better to run only when target is actually in libc.
+ */
+
+#define DST (0x1122334455667788UL)
+#define SRC (0xf0f0f0f0f0f0f0f0UL)
+#define EXPECT (0xefdfcfbfaf9f8f7fUL)
+
+#define atf_sync_prefetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE expval; \
+ TYPE expres; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ expval = (TYPE)EXPECT; \
+ expres = (TYPE)DST; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
+}
+
+atf_sync_prefetch(__sync_fetch_and_nand_1, uint8_t, PRIx8);
+atf_sync_prefetch(__sync_fetch_and_nand_2, uint16_t, PRIx16);
+atf_sync_prefetch(__sync_fetch_and_nand_4, uint32_t, PRIx32);
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_sync_prefetch(__sync_fetch_and_nand_8, uint64_t, PRIx64);
+#endif
+
+#define atf_sync_postfetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE exp; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ exp = (TYPE)EXPECT; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
+}
+
+atf_sync_postfetch(__sync_nand_and_fetch_1, uint8_t, PRIx8);
+atf_sync_postfetch(__sync_nand_and_fetch_2, uint16_t, PRIx16);
+atf_sync_postfetch(__sync_nand_and_fetch_4, uint32_t, PRIx32);
+#ifdef __HAVE_ATOMIC64_OPS
+atf_sync_postfetch(__sync_nand_and_fetch_8, uint64_t, PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_nand_1);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_nand_2);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_nand_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_nand_8);
+#endif
+
+ ATF_TP_ADD_TC(tp, __sync_nand_and_fetch_1);
+ ATF_TP_ADD_TC(tp, __sync_nand_and_fetch_2);
+ ATF_TP_ADD_TC(tp, __sync_nand_and_fetch_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_nand_and_fetch_8);
+#endif
+
+ return atf_no_error();
+}
Index: src/tests/lib/libc/atomic/t___sync_or.c
diff -u /dev/null src/tests/lib/libc/atomic/t___sync_or.c:1.1
--- /dev/null Tue Feb 26 10:01:41 2019
+++ src/tests/lib/libc/atomic/t___sync_or.c Tue Feb 26 10:01:41 2019
@@ -0,0 +1,128 @@
+/* $NetBSD: t___sync_or.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
+
+/*
+ * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD: t___sync_or.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
+
+#include <atf-c.h>
+#include <inttypes.h>
+#include <machine/types.h> // for __HAVE_ATOMIC64_OPS
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+/* XXX
+ * Depending on a combination of arch and compiler, __sync_* is
+ * implemented as compiler's builtin function. In that case, even
+ * if libc exports the function symbol, it is not used. As a result
+ * this tests will examine compiler's builtin functions.
+ * It's better to run only when target is actually in libc.
+ */
+
+#define DST (0x1122334455667788UL)
+#define SRC (0xf0f0f0f0f0f0f0f0UL)
+#define EXPECT (0xf1f2f3f4f5f6f7f8UL)
+
+#define atf_sync_prefetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE expval; \
+ TYPE expres; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ expval = (TYPE)EXPECT; \
+ expres = (TYPE)DST; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
+}
+
+atf_sync_prefetch(__sync_fetch_and_or_1, uint8_t, PRIx8);
+atf_sync_prefetch(__sync_fetch_and_or_2, uint16_t, PRIx16);
+atf_sync_prefetch(__sync_fetch_and_or_4, uint32_t, PRIx32);
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_sync_prefetch(__sync_fetch_and_or_8, uint64_t, PRIx64);
+#endif
+
+#define atf_sync_postfetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE exp; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ exp = (TYPE)EXPECT; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
+}
+
+atf_sync_postfetch(__sync_or_and_fetch_1, uint8_t, PRIx8);
+atf_sync_postfetch(__sync_or_and_fetch_2, uint16_t, PRIx16);
+atf_sync_postfetch(__sync_or_and_fetch_4, uint32_t, PRIx32);
+#ifdef __HAVE_ATOMIC64_OPS
+atf_sync_postfetch(__sync_or_and_fetch_8, uint64_t, PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_or_1);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_or_2);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_or_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_or_8);
+#endif
+
+ ATF_TP_ADD_TC(tp, __sync_or_and_fetch_1);
+ ATF_TP_ADD_TC(tp, __sync_or_and_fetch_2);
+ ATF_TP_ADD_TC(tp, __sync_or_and_fetch_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_or_and_fetch_8);
+#endif
+
+ return atf_no_error();
+}
Index: src/tests/lib/libc/atomic/t___sync_sub.c
diff -u /dev/null src/tests/lib/libc/atomic/t___sync_sub.c:1.1
--- /dev/null Tue Feb 26 10:01:41 2019
+++ src/tests/lib/libc/atomic/t___sync_sub.c Tue Feb 26 10:01:41 2019
@@ -0,0 +1,128 @@
+/* $NetBSD: t___sync_sub.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
+
+/*
+ * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD: t___sync_sub.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
+
+#include <atf-c.h>
+#include <inttypes.h>
+#include <machine/types.h> // for __HAVE_ATOMIC64_OPS
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+/* XXX
+ * Depending on a combination of arch and compiler, __sync_* is
+ * implemented as compiler's builtin function. In that case, even
+ * if libc exports the function symbol, it is not used. As a result
+ * this tests will examine compiler's builtin functions.
+ * It's better to run only when target is actually in libc.
+ */
+
+#define DST (0xffeeddccbbaa9988UL)
+#define SRC (0x1122334455667787UL)
+#define EXPECT (0xeeccaa8866442201UL)
+
+#define atf_sync_prefetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE expval; \
+ TYPE expres; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ expval = (TYPE)EXPECT; \
+ expres = (TYPE)DST; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
+}
+
+atf_sync_prefetch(__sync_fetch_and_sub_1, uint8_t, PRIx8);
+atf_sync_prefetch(__sync_fetch_and_sub_2, uint16_t, PRIx16);
+atf_sync_prefetch(__sync_fetch_and_sub_4, uint32_t, PRIx32);
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_sync_prefetch(__sync_fetch_and_sub_8, uint64_t, PRIx64);
+#endif
+
+#define atf_sync_postfetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE exp; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ exp = (TYPE)EXPECT; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
+}
+
+atf_sync_postfetch(__sync_sub_and_fetch_1, uint8_t, PRIx8);
+atf_sync_postfetch(__sync_sub_and_fetch_2, uint16_t, PRIx16);
+atf_sync_postfetch(__sync_sub_and_fetch_4, uint32_t, PRIx32);
+#ifdef __HAVE_ATOMIC64_OPS
+atf_sync_postfetch(__sync_sub_and_fetch_8, uint64_t, PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_sub_1);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_sub_2);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_sub_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_sub_8);
+#endif
+
+ ATF_TP_ADD_TC(tp, __sync_sub_and_fetch_1);
+ ATF_TP_ADD_TC(tp, __sync_sub_and_fetch_2);
+ ATF_TP_ADD_TC(tp, __sync_sub_and_fetch_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_sub_and_fetch_8);
+#endif
+
+ return atf_no_error();
+}
Index: src/tests/lib/libc/atomic/t___sync_xor.c
diff -u /dev/null src/tests/lib/libc/atomic/t___sync_xor.c:1.1
--- /dev/null Tue Feb 26 10:01:41 2019
+++ src/tests/lib/libc/atomic/t___sync_xor.c Tue Feb 26 10:01:41 2019
@@ -0,0 +1,128 @@
+/* $NetBSD: t___sync_xor.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
+
+/*
+ * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD: t___sync_xor.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
+
+#include <atf-c.h>
+#include <inttypes.h>
+#include <machine/types.h> // for __HAVE_ATOMIC64_OPS
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+/* XXX
+ * Depending on a combination of arch and compiler, __sync_* is
+ * implemented as compiler's builtin function. In that case, even
+ * if libc exports the function symbol, it is not used. As a result
+ * this tests will examine compiler's builtin functions.
+ * It's better to run only when target is actually in libc.
+ */
+
+#define DST (0x1122334455667788UL)
+#define SRC (0xf0f0f0f0f0f0f0f0UL)
+#define EXPECT (0xe1d2c3b4a5968778UL)
+
+#define atf_sync_prefetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE expval; \
+ TYPE expres; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ expval = (TYPE)EXPECT; \
+ expres = (TYPE)DST; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
+}
+
+atf_sync_prefetch(__sync_fetch_and_xor_1, uint8_t, PRIx8);
+atf_sync_prefetch(__sync_fetch_and_xor_2, uint16_t, PRIx16);
+atf_sync_prefetch(__sync_fetch_and_xor_4, uint32_t, PRIx32);
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_sync_prefetch(__sync_fetch_and_xor_8, uint64_t, PRIx64);
+#endif
+
+#define atf_sync_postfetch(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE exp; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ exp = (TYPE)EXPECT; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
+}
+
+atf_sync_postfetch(__sync_xor_and_fetch_1, uint8_t, PRIx8);
+atf_sync_postfetch(__sync_xor_and_fetch_2, uint16_t, PRIx16);
+atf_sync_postfetch(__sync_xor_and_fetch_4, uint32_t, PRIx32);
+#ifdef __HAVE_ATOMIC64_OPS
+atf_sync_postfetch(__sync_xor_and_fetch_8, uint64_t, PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_xor_1);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_xor_2);
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_xor_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_fetch_and_xor_8);
+#endif
+
+ ATF_TP_ADD_TC(tp, __sync_xor_and_fetch_1);
+ ATF_TP_ADD_TC(tp, __sync_xor_and_fetch_2);
+ ATF_TP_ADD_TC(tp, __sync_xor_and_fetch_4);
+#ifdef __HAVE_ATOMIC64_OPS
+ ATF_TP_ADD_TC(tp, __sync_xor_and_fetch_8);
+#endif
+
+ return atf_no_error();
+}
