Module Name:    src
Committed By:   maxv
Date:           Tue Feb 26 12:23:12 UTC 2019

Modified Files:
        src/lib/libnvmm: libnvmm_x86.c
        src/sys/dev/nvmm/x86: nvmm_x86.c nvmm_x86.h nvmm_x86_svm.c
            nvmm_x86_vmx.c
        src/tests/lib/libnvmm: h_io_assist.c h_mem_assist.c

Log Message:
Change the layout of the SEG state:

 - Reorder it, to match the CPU encoding. This is the universal order,
   also used by Qemu. Drop the seg_to_nvmm[] tables.

 - Compress it. This divides its size by two.

 - Rename some of its fields, to better match the x86 spec. Also, take S
   out of Type, this was a NetBSD-ism that was likely confusing to other
   people.


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/lib/libnvmm/libnvmm_x86.c
cvs rdiff -u -r1.1 -r1.2 src/sys/dev/nvmm/x86/nvmm_x86.c
cvs rdiff -u -r1.6 -r1.7 src/sys/dev/nvmm/x86/nvmm_x86.h
cvs rdiff -u -r1.31 -r1.32 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.14 -r1.15 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
cvs rdiff -u -r1.2 -r1.3 src/tests/lib/libnvmm/h_io_assist.c
cvs rdiff -u -r1.5 -r1.6 src/tests/lib/libnvmm/h_mem_assist.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/lib/libnvmm/libnvmm_x86.c
diff -u src/lib/libnvmm/libnvmm_x86.c:1.25 src/lib/libnvmm/libnvmm_x86.c:1.26
--- src/lib/libnvmm/libnvmm_x86.c:1.25	Tue Feb 26 10:18:39 2019
+++ src/lib/libnvmm/libnvmm_x86.c	Tue Feb 26 12:23:12 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: libnvmm_x86.c,v 1.25 2019/02/26 10:18:39 maxv Exp $	*/
+/*	$NetBSD: libnvmm_x86.c,v 1.26 2019/02/26 12:23:12 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -60,11 +60,12 @@ int
 nvmm_vcpu_dump(struct nvmm_machine *mach, nvmm_cpuid_t cpuid)
 {
 	struct nvmm_x64_state state;
+	uint16_t *attr;
 	size_t i;
 	int ret;
 
 	const char *segnames[] = {
-		"CS", "DS", "ES", "FS", "GS", "SS", "GDT", "IDT", "LDT", "TR"
+		"ES", "CS", "SS", "DS", "FS", "GS", "GDT", "IDT", "LDT", "TR"
 	};
 
 	ret = nvmm_vcpu_getstate(mach, cpuid, &state, NVMM_X64_STATE_ALL);
@@ -72,26 +73,26 @@ nvmm_vcpu_dump(struct nvmm_machine *mach
 		return -1;
 
 	printf("+ VCPU id=%d\n", (int)cpuid);
-	printf("| -> RIP=%p\n", (void *)state.gprs[NVMM_X64_GPR_RIP]);
-	printf("| -> RSP=%p\n", (void *)state.gprs[NVMM_X64_GPR_RSP]);
-	printf("| -> RAX=%p\n", (void *)state.gprs[NVMM_X64_GPR_RAX]);
-	printf("| -> RBX=%p\n", (void *)state.gprs[NVMM_X64_GPR_RBX]);
-	printf("| -> RCX=%p\n", (void *)state.gprs[NVMM_X64_GPR_RCX]);
+	printf("| -> RIP=%"PRIx64"\n", state.gprs[NVMM_X64_GPR_RIP]);
+	printf("| -> RSP=%"PRIx64"\n", state.gprs[NVMM_X64_GPR_RSP]);
+	printf("| -> RAX=%"PRIx64"\n", state.gprs[NVMM_X64_GPR_RAX]);
+	printf("| -> RBX=%"PRIx64"\n", state.gprs[NVMM_X64_GPR_RBX]);
+	printf("| -> RCX=%"PRIx64"\n", state.gprs[NVMM_X64_GPR_RCX]);
 	printf("| -> RFLAGS=%p\n", (void *)state.gprs[NVMM_X64_GPR_RFLAGS]);
 	for (i = 0; i < NVMM_X64_NSEG; i++) {
-		printf("| -> %s: sel=0x%lx base=%p, limit=%p, P=%d, D=%d L=%d\n",
+		attr = (uint16_t *)&state.segs[i].attrib;
+		printf("| -> %s: sel=0x%x base=%"PRIx64", limit=%x, attrib=%x\n",
 		    segnames[i],
 		    state.segs[i].selector,
-		    (void *)state.segs[i].base,
-		    (void *)state.segs[i].limit,
-		    state.segs[i].attrib.p, state.segs[i].attrib.def32,
-		    state.segs[i].attrib.lng);
-	}
-	printf("| -> MSR_EFER=%p\n", (void *)state.msrs[NVMM_X64_MSR_EFER]);
-	printf("| -> CR0=%p\n", (void *)state.crs[NVMM_X64_CR_CR0]);
-	printf("| -> CR3=%p\n", (void *)state.crs[NVMM_X64_CR_CR3]);
-	printf("| -> CR4=%p\n", (void *)state.crs[NVMM_X64_CR_CR4]);
-	printf("| -> CR8=%p\n", (void *)state.crs[NVMM_X64_CR_CR8]);
+		    state.segs[i].base,
+		    state.segs[i].limit,
+		    *attr);
+	}
+	printf("| -> MSR_EFER=%"PRIx64"\n", state.msrs[NVMM_X64_MSR_EFER]);
+	printf("| -> CR0=%"PRIx64"\n", state.crs[NVMM_X64_CR_CR0]);
+	printf("| -> CR3=%"PRIx64"\n", state.crs[NVMM_X64_CR_CR3]);
+	printf("| -> CR4=%"PRIx64"\n", state.crs[NVMM_X64_CR_CR4]);
+	printf("| -> CR8=%"PRIx64"\n", state.crs[NVMM_X64_CR_CR8]);
 
 	return 0;
 }
@@ -449,21 +450,21 @@ is_long_mode(struct nvmm_x64_state *stat
 static inline bool
 is_64bit(struct nvmm_x64_state *state)
 {
-	return (state->segs[NVMM_X64_SEG_CS].attrib.lng != 0);
+	return (state->segs[NVMM_X64_SEG_CS].attrib.l != 0);
 }
 
 static inline bool
 is_32bit(struct nvmm_x64_state *state)
 {
-	return (state->segs[NVMM_X64_SEG_CS].attrib.lng == 0) &&
-	    (state->segs[NVMM_X64_SEG_CS].attrib.def32 == 1);
+	return (state->segs[NVMM_X64_SEG_CS].attrib.l == 0) &&
+	    (state->segs[NVMM_X64_SEG_CS].attrib.def == 1);
 }
 
 static inline bool
 is_16bit(struct nvmm_x64_state *state)
 {
-	return (state->segs[NVMM_X64_SEG_CS].attrib.lng == 0) &&
-	    (state->segs[NVMM_X64_SEG_CS].attrib.def32 == 0);
+	return (state->segs[NVMM_X64_SEG_CS].attrib.l == 0) &&
+	    (state->segs[NVMM_X64_SEG_CS].attrib.def == 0);
 }
 
 static int
@@ -479,8 +480,8 @@ segment_check(struct nvmm_x64_state_seg 
 		goto error;
 	}
 
-	limit = (seg->limit + 1);
-	if (__predict_true(seg->attrib.gran)) {
+	limit = (uint64_t)seg->limit + 1;
+	if (__predict_true(seg->attrib.g)) {
 		limit *= PAGE_SIZE;
 	}
 

Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.1 src/sys/dev/nvmm/x86/nvmm_x86.c:1.2
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.1	Sat Feb 23 12:27:00 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86.c	Tue Feb 26 12:23:12 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86.c,v 1.1 2019/02/23 12:27:00 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.c,v 1.2 2019/02/26 12:23:12 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.1 2019/02/23 12:27:00 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.2 2019/02/26 12:23:12 maxv Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -54,57 +54,63 @@ __KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v
 
 const struct nvmm_x64_state nvmm_x86_reset_state = {
 	.segs = {
-		[NVMM_X64_SEG_CS] = {
-			.selector = 0xF000,
-			.base = 0xFFFF0000,
+		[NVMM_X64_SEG_ES] = {
+			.selector = 0x0000,
+			.base = 0x00000000,
 			.limit = 0xFFFF,
 			.attrib = {
-				.type = SDT_MEMRWA,
+				.type = 3,
+				.s = 1,
 				.p = 1,
 			}
 		},
-		[NVMM_X64_SEG_DS] = {
-			.selector = 0x0000,
-			.base = 0x00000000,
+		[NVMM_X64_SEG_CS] = {
+			.selector = 0xF000,
+			.base = 0xFFFF0000,
 			.limit = 0xFFFF,
 			.attrib = {
-				.type = SDT_MEMRWA,
+				.type = 3,
+				.s = 1,
 				.p = 1,
 			}
 		},
-		[NVMM_X64_SEG_ES] = {
+		[NVMM_X64_SEG_SS] = {
 			.selector = 0x0000,
 			.base = 0x00000000,
 			.limit = 0xFFFF,
 			.attrib = {
-				.type = SDT_MEMRWA,
+				.type = 3,
+				.s = 1,
 				.p = 1,
 			}
 		},
-		[NVMM_X64_SEG_FS] = {
+		[NVMM_X64_SEG_DS] = {
 			.selector = 0x0000,
 			.base = 0x00000000,
 			.limit = 0xFFFF,
 			.attrib = {
-				.type = SDT_MEMRWA,
+				.type = 3,
+				.s = 1,
 				.p = 1,
 			}
 		},
-		[NVMM_X64_SEG_GS] = {
+		[NVMM_X64_SEG_FS] = {
 			.selector = 0x0000,
 			.base = 0x00000000,
 			.limit = 0xFFFF,
 			.attrib = {
-				.type = SDT_MEMRWA,
+				.type = 3,
+				.s = 1,
 				.p = 1,
 			}
 		},
-		[NVMM_X64_SEG_SS] = {
+		[NVMM_X64_SEG_GS] = {
 			.selector = 0x0000,
 			.base = 0x00000000,
 			.limit = 0xFFFF,
 			.attrib = {
-				.type = SDT_MEMRWA,
+				.type = 3,
+				.s = 1,
 				.p = 1,
 			}
 		},
@@ -113,7 +119,8 @@ const struct nvmm_x64_state nvmm_x86_res
 			.base = 0x00000000,
 			.limit = 0xFFFF,
 			.attrib = {
-				.type = SDT_MEMRW,
+				.type = 2,
+				.s = 1,
 				.p = 1,
 			}
 		},
@@ -122,7 +129,8 @@ const struct nvmm_x64_state nvmm_x86_res
 			.base = 0x00000000,
 			.limit = 0xFFFF,
 			.attrib = {
-				.type = SDT_MEMRW,
+				.type = 2,
+				.s = 1,
 				.p = 1,
 			}
 		},
@@ -132,6 +140,7 @@ const struct nvmm_x64_state nvmm_x86_res
 			.limit = 0xFFFF,
 			.attrib = {
 				.type = SDT_SYSLDT,
+				.s = 0,
 				.p = 1,
 			}
 		},
@@ -141,6 +150,7 @@ const struct nvmm_x64_state nvmm_x86_res
 			.limit = 0xFFFF,
 			.attrib = {
 				.type = SDT_SYS286BSY,
+				.s = 0,
 				.p = 1,
 			}
 		},

Index: src/sys/dev/nvmm/x86/nvmm_x86.h
diff -u src/sys/dev/nvmm/x86/nvmm_x86.h:1.6 src/sys/dev/nvmm/x86/nvmm_x86.h:1.7
--- src/sys/dev/nvmm/x86/nvmm_x86.h:1.6	Sat Feb 23 12:27:00 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86.h	Tue Feb 26 12:23:12 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86.h,v 1.6 2019/02/23 12:27:00 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86.h,v 1.7 2019/02/26 12:23:12 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -33,12 +33,12 @@
 #define _NVMM_X86_H_
 
 /* Segments. */
-#define NVMM_X64_SEG_CS			0
-#define NVMM_X64_SEG_DS			1
-#define NVMM_X64_SEG_ES			2
-#define NVMM_X64_SEG_FS			3
-#define NVMM_X64_SEG_GS			4
-#define NVMM_X64_SEG_SS			5
+#define NVMM_X64_SEG_ES			0
+#define NVMM_X64_SEG_CS			1
+#define NVMM_X64_SEG_SS			2
+#define NVMM_X64_SEG_DS			3
+#define NVMM_X64_SEG_FS			4
+#define NVMM_X64_SEG_GS			5
 #define NVMM_X64_SEG_GDT		6
 #define NVMM_X64_SEG_IDT		7
 #define NVMM_X64_SEG_LDT		8
@@ -109,18 +109,19 @@
 #include <x86/cpu_extended_state.h>
 
 struct nvmm_x64_state_seg {
-	uint64_t selector;
+	uint16_t selector;
 	struct {		/* hidden */
-		uint64_t type:5;
-		uint64_t dpl:2;
-		uint64_t p:1;
-		uint64_t avl:1;
-		uint64_t lng:1;
-		uint64_t def32:1;
-		uint64_t gran:1;
-		uint64_t rsvd:52;
+		uint16_t type:4;
+		uint16_t s:1;
+		uint16_t dpl:2;
+		uint16_t p:1;
+		uint16_t avl:1;
+		uint16_t l:1;
+		uint16_t def:1;
+		uint16_t g:1;
+		uint16_t rsvd:4;
 	} attrib;
-	uint64_t limit;		/* hidden */
+	uint32_t limit;		/* hidden */
 	uint64_t base;		/* hidden */
 };
 

Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.31 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.32
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.31	Sat Feb 23 12:27:00 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c	Tue Feb 26 12:23:12 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_svm.c,v 1.31 2019/02/23 12:27:00 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_svm.c,v 1.32 2019/02/26 12:23:12 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.31 2019/02/23 12:27:00 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.32 2019/02/26 12:23:12 maxv Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -884,15 +884,6 @@ svm_exit_hlt(struct nvmm_machine *mach, 
 #define SVM_EXIT_IO_STR		__BIT(2)
 #define SVM_EXIT_IO_IN		__BIT(0)
 
-static const int seg_to_nvmm[] = {
-	[0] = NVMM_X64_SEG_ES,
-	[1] = NVMM_X64_SEG_CS,
-	[2] = NVMM_X64_SEG_SS,
-	[3] = NVMM_X64_SEG_DS,
-	[4] = NVMM_X64_SEG_FS,
-	[5] = NVMM_X64_SEG_GS
-};
-
 static void
 svm_exit_io(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
     struct nvmm_exit *exit)
@@ -913,7 +904,7 @@ svm_exit_io(struct nvmm_machine *mach, s
 
 	if (svm_decode_assist) {
 		KASSERT(__SHIFTOUT(info, SVM_EXIT_IO_SEG) < 6);
-		exit->u.io.seg = seg_to_nvmm[__SHIFTOUT(info, SVM_EXIT_IO_SEG)];
+		exit->u.io.seg = __SHIFTOUT(info, SVM_EXIT_IO_SEG);
 	} else {
 		exit->u.io.seg = -1;
 	}
@@ -1468,15 +1459,14 @@ svm_vcpu_msr_allow(uint8_t *bitmap, uint
 	}
 }
 
-
-
-#define SVM_SEG_ATTRIB_TYPE		__BITS(4,0)
+#define SVM_SEG_ATTRIB_TYPE		__BITS(3,0)
+#define SVM_SEG_ATTRIB_S		__BIT(4)
 #define SVM_SEG_ATTRIB_DPL		__BITS(6,5)
 #define SVM_SEG_ATTRIB_P		__BIT(7)
 #define SVM_SEG_ATTRIB_AVL		__BIT(8)
-#define SVM_SEG_ATTRIB_LONG		__BIT(9)
-#define SVM_SEG_ATTRIB_DEF32		__BIT(10)
-#define SVM_SEG_ATTRIB_GRAN		__BIT(11)
+#define SVM_SEG_ATTRIB_L		__BIT(9)
+#define SVM_SEG_ATTRIB_DEF		__BIT(10)
+#define SVM_SEG_ATTRIB_G		__BIT(11)
 
 static void
 svm_vcpu_setstate_seg(const struct nvmm_x64_state_seg *seg,
@@ -1485,12 +1475,13 @@ svm_vcpu_setstate_seg(const struct nvmm_
 	vseg->selector = seg->selector;
 	vseg->attrib =
 	    __SHIFTIN(seg->attrib.type, SVM_SEG_ATTRIB_TYPE) |
+	    __SHIFTIN(seg->attrib.s, SVM_SEG_ATTRIB_S) |
 	    __SHIFTIN(seg->attrib.dpl, SVM_SEG_ATTRIB_DPL) |
 	    __SHIFTIN(seg->attrib.p, SVM_SEG_ATTRIB_P) |
 	    __SHIFTIN(seg->attrib.avl, SVM_SEG_ATTRIB_AVL) |
-	    __SHIFTIN(seg->attrib.lng, SVM_SEG_ATTRIB_LONG) |
-	    __SHIFTIN(seg->attrib.def32, SVM_SEG_ATTRIB_DEF32) |
-	    __SHIFTIN(seg->attrib.gran, SVM_SEG_ATTRIB_GRAN);
+	    __SHIFTIN(seg->attrib.l, SVM_SEG_ATTRIB_L) |
+	    __SHIFTIN(seg->attrib.def, SVM_SEG_ATTRIB_DEF) |
+	    __SHIFTIN(seg->attrib.g, SVM_SEG_ATTRIB_G);
 	vseg->limit = seg->limit;
 	vseg->base = seg->base;
 }
@@ -1500,12 +1491,13 @@ svm_vcpu_getstate_seg(struct nvmm_x64_st
 {
 	seg->selector = vseg->selector;
 	seg->attrib.type = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_TYPE);
+	seg->attrib.s = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_S);
 	seg->attrib.dpl = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_DPL);
 	seg->attrib.p = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_P);
 	seg->attrib.avl = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_AVL);
-	seg->attrib.lng = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_LONG);
-	seg->attrib.def32 = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_DEF32);
-	seg->attrib.gran = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_GRAN);
+	seg->attrib.l = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_L);
+	seg->attrib.def = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_DEF);
+	seg->attrib.g = __SHIFTOUT(vseg->attrib, SVM_SEG_ATTRIB_G);
 	seg->limit = vseg->limit;
 	seg->base = vseg->base;
 }

Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.14 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.15
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.14	Sat Feb 23 12:27:00 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c	Tue Feb 26 12:23:12 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: nvmm_x86_vmx.c,v 1.14 2019/02/23 12:27:00 maxv Exp $	*/
+/*	$NetBSD: nvmm_x86_vmx.c,v 1.15 2019/02/26 12:23:12 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.14 2019/02/23 12:27:00 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.15 2019/02/26 12:23:12 maxv Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -1320,15 +1320,6 @@ vmx_exit_cr(struct nvmm_machine *mach, s
 #define		IO_ADRSIZE_64	2
 #define VMX_INFO_IO_SEG		__BITS(17,15)
 
-static const int seg_to_nvmm[] = {
-	[0] = NVMM_X64_SEG_ES,
-	[1] = NVMM_X64_SEG_CS,
-	[2] = NVMM_X64_SEG_SS,
-	[3] = NVMM_X64_SEG_DS,
-	[4] = NVMM_X64_SEG_FS,
-	[5] = NVMM_X64_SEG_GS
-};
-
 static void
 vmx_exit_io(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
     struct nvmm_exit *exit)
@@ -1349,7 +1340,7 @@ vmx_exit_io(struct nvmm_machine *mach, s
 	exit->u.io.port = __SHIFTOUT(qual, VMX_QUAL_IO_PORT);
 
 	KASSERT(__SHIFTOUT(info, VMX_INFO_IO_SEG) < 6);
-	exit->u.io.seg = seg_to_nvmm[__SHIFTOUT(info, VMX_INFO_IO_SEG)];
+	exit->u.io.seg = __SHIFTOUT(info, VMX_INFO_IO_SEG);
 
 	if (__SHIFTOUT(info, VMX_INFO_IO_ADRSIZE) == IO_ADRSIZE_64) {
 		exit->u.io.address_size = 8;
@@ -1938,13 +1929,14 @@ vmx_vcpu_msr_allow(uint8_t *bitmap, uint
 	}
 }
 
-#define VMX_SEG_ATTRIB_TYPE		__BITS(4,0)
+#define VMX_SEG_ATTRIB_TYPE		__BITS(3,0)
+#define VMX_SEG_ATTRIB_S		__BIT(4)
 #define VMX_SEG_ATTRIB_DPL		__BITS(6,5)
 #define VMX_SEG_ATTRIB_P		__BIT(7)
 #define VMX_SEG_ATTRIB_AVL		__BIT(12)
-#define VMX_SEG_ATTRIB_LONG		__BIT(13)
-#define VMX_SEG_ATTRIB_DEF32		__BIT(14)
-#define VMX_SEG_ATTRIB_GRAN		__BIT(15)
+#define VMX_SEG_ATTRIB_L		__BIT(13)
+#define VMX_SEG_ATTRIB_DEF		__BIT(14)
+#define VMX_SEG_ATTRIB_G		__BIT(15)
 #define VMX_SEG_ATTRIB_UNUSABLE		__BIT(16)
 
 static void
@@ -1954,12 +1946,13 @@ vmx_vcpu_setstate_seg(const struct nvmm_
 
 	attrib =
 	    __SHIFTIN(segs[idx].attrib.type, VMX_SEG_ATTRIB_TYPE) |
+	    __SHIFTIN(segs[idx].attrib.s, VMX_SEG_ATTRIB_S) |
 	    __SHIFTIN(segs[idx].attrib.dpl, VMX_SEG_ATTRIB_DPL) |
 	    __SHIFTIN(segs[idx].attrib.p, VMX_SEG_ATTRIB_P) |
 	    __SHIFTIN(segs[idx].attrib.avl, VMX_SEG_ATTRIB_AVL) |
-	    __SHIFTIN(segs[idx].attrib.lng, VMX_SEG_ATTRIB_LONG) |
-	    __SHIFTIN(segs[idx].attrib.def32, VMX_SEG_ATTRIB_DEF32) |
-	    __SHIFTIN(segs[idx].attrib.gran, VMX_SEG_ATTRIB_GRAN) |
+	    __SHIFTIN(segs[idx].attrib.l, VMX_SEG_ATTRIB_L) |
+	    __SHIFTIN(segs[idx].attrib.def, VMX_SEG_ATTRIB_DEF) |
+	    __SHIFTIN(segs[idx].attrib.g, VMX_SEG_ATTRIB_G) |
 	    (!segs[idx].attrib.p ? VMX_SEG_ATTRIB_UNUSABLE : 0);
 
 	if (idx != NVMM_X64_SEG_GDT && idx != NVMM_X64_SEG_IDT) {
@@ -1973,22 +1966,26 @@ vmx_vcpu_setstate_seg(const struct nvmm_
 static void
 vmx_vcpu_getstate_seg(struct nvmm_x64_state_seg *segs, int idx)
 {
-	uint64_t attrib = 0;
+	uint64_t selector, base, limit, attrib = 0;
 
 	if (idx != NVMM_X64_SEG_GDT && idx != NVMM_X64_SEG_IDT) {
-		vmx_vmread(vmx_guest_segs[idx].selector, &segs[idx].selector);
+		vmx_vmread(vmx_guest_segs[idx].selector, &selector);
 		vmx_vmread(vmx_guest_segs[idx].attrib, &attrib);
 	}
-	vmx_vmread(vmx_guest_segs[idx].limit, &segs[idx].limit);
-	vmx_vmread(vmx_guest_segs[idx].base, &segs[idx].base);
+	vmx_vmread(vmx_guest_segs[idx].limit, &limit);
+	vmx_vmread(vmx_guest_segs[idx].base, &base);
 
+	segs[idx].selector = selector;
+	segs[idx].limit = limit;
+	segs[idx].base = base;
 	segs[idx].attrib.type = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_TYPE);
+	segs[idx].attrib.s = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_S);
 	segs[idx].attrib.dpl = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_DPL);
 	segs[idx].attrib.p = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_P);
 	segs[idx].attrib.avl = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_AVL);
-	segs[idx].attrib.lng = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_LONG);
-	segs[idx].attrib.def32 = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_DEF32);
-	segs[idx].attrib.gran = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_GRAN);
+	segs[idx].attrib.l = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_L);
+	segs[idx].attrib.def = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_DEF);
+	segs[idx].attrib.g = __SHIFTOUT(attrib, VMX_SEG_ATTRIB_G);
 	if (attrib & VMX_SEG_ATTRIB_UNUSABLE) {
 		segs[idx].attrib.p = 0;
 	}

Index: src/tests/lib/libnvmm/h_io_assist.c
diff -u src/tests/lib/libnvmm/h_io_assist.c:1.2 src/tests/lib/libnvmm/h_io_assist.c:1.3
--- src/tests/lib/libnvmm/h_io_assist.c:1.2	Tue Feb  5 17:03:10 2019
+++ src/tests/lib/libnvmm/h_io_assist.c	Tue Feb 26 12:23:12 2019
@@ -57,12 +57,13 @@ init_seg(struct nvmm_x64_state_seg *seg,
 {
 	seg->selector = sel;
 	seg->attrib.type = type;
+	seg->attrib.s = (type & 0b10000) != 0;
 	seg->attrib.dpl = 0;
 	seg->attrib.p = 1;
 	seg->attrib.avl = 1;
-	seg->attrib.lng = 1;
-	seg->attrib.def32 = 0;
-	seg->attrib.gran = 1;
+	seg->attrib.l = 1;
+	seg->attrib.def = 0;
+	seg->attrib.g = 1;
 	seg->limit = 0x0000FFFF;
 	seg->base = 0x00000000;
 }

Index: src/tests/lib/libnvmm/h_mem_assist.c
diff -u src/tests/lib/libnvmm/h_mem_assist.c:1.5 src/tests/lib/libnvmm/h_mem_assist.c:1.6
--- src/tests/lib/libnvmm/h_mem_assist.c:1.5	Thu Feb  7 10:58:45 2019
+++ src/tests/lib/libnvmm/h_mem_assist.c	Tue Feb 26 12:23:12 2019
@@ -54,12 +54,13 @@ init_seg(struct nvmm_x64_state_seg *seg,
 {
 	seg->selector = sel;
 	seg->attrib.type = type;
+	seg->attrib.s = (type & 0b10000) != 0;
 	seg->attrib.dpl = 0;
 	seg->attrib.p = 1;
 	seg->attrib.avl = 1;
-	seg->attrib.lng = 1;
-	seg->attrib.def32 = 0;
-	seg->attrib.gran = 1;
+	seg->attrib.l = 1;
+	seg->attrib.def = 0;
+	seg->attrib.g = 1;
 	seg->limit = 0x0000FFFF;
 	seg->base = 0x00000000;
 }

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