Module Name: src
Committed By: ryo
Date: Wed Mar 20 07:16:07 UTC 2019
Modified Files:
src/sys/arch/aarch64/aarch64: db_machdep.c
src/sys/arch/aarch64/include: armreg.h
Log Message:
- add reg_{s1e0r,s1e0w,s1e1r,s1e1w}_write() macro.
- show the result of AT insn at ddb "machine pte" command.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/aarch64/aarch64/db_machdep.c
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/aarch64/include/armreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/db_machdep.c
diff -u src/sys/arch/aarch64/aarch64/db_machdep.c:1.15 src/sys/arch/aarch64/aarch64/db_machdep.c:1.16
--- src/sys/arch/aarch64/aarch64/db_machdep.c:1.15 Tue Mar 19 16:45:28 2019
+++ src/sys/arch/aarch64/aarch64/db_machdep.c Wed Mar 20 07:16:07 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.15 2019/03/19 16:45:28 ryo Exp $ */
+/* $NetBSD: db_machdep.c,v 1.16 2019/03/20 07:16:07 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.15 2019/03/19 16:45:28 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.16 2019/03/20 07:16:07 ryo Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -346,14 +346,47 @@ db_md_lwp_cmd(db_expr_t addr, bool have_
db_printf("\tl->l_wmesg =%s\n", SAFESTRPTR(l->l_wmesg));
}
+static void
+db_par_print(uint64_t par, vaddr_t va)
+{
+ paddr_t pa = (__SHIFTOUT(par, PAR_PA) << 12) + (va & 0xfff);
+
+ db_printf("%016"PRIx64": ATTR=0x%02lx, NS=%ld, S=%ld, SHA=%ld, PTW=%ld"
+ ", FST=%ld, F=%ld, PA=%016"PRIxPADDR"\n",
+ par,
+ __SHIFTOUT(par, PAR_ATTR),
+ __SHIFTOUT(par, PAR_NS),
+ __SHIFTOUT(par, PAR_S),
+ __SHIFTOUT(par, PAR_SHA),
+ __SHIFTOUT(par, PAR_PTW),
+ __SHIFTOUT(par, PAR_FST),
+ __SHIFTOUT(par, PAR_F),
+ pa);
+}
+
void
db_md_pte_cmd(db_expr_t addr, bool have_addr, db_expr_t count,
const char *modif)
{
+ uint64_t par;
+
if (!have_addr) {
db_printf("pte address must be specified\n");
return;
}
+
+ reg_s1e0r_write(addr);
+ __asm __volatile ("isb");
+ par = reg_par_el1_read();
+ db_printf("Stage1 EL0 translation %016llx -> PAR_EL1 = ", addr);
+ db_par_print(par, addr);
+
+ reg_s1e1r_write(addr);
+ __asm __volatile ("isb");
+ par = reg_par_el1_read();
+ db_printf("Stage1 EL1 translation %016llx -> PAR_EL1 = ", addr);
+ db_par_print(par, addr);
+
pmap_db_pteinfo(addr, db_printf);
}
Index: src/sys/arch/aarch64/include/armreg.h
diff -u src/sys/arch/aarch64/include/armreg.h:1.23 src/sys/arch/aarch64/include/armreg.h:1.24
--- src/sys/arch/aarch64/include/armreg.h:1.23 Wed Jan 30 02:02:23 2019
+++ src/sys/arch/aarch64/include/armreg.h Wed Mar 20 07:16:07 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.23 2019/01/30 02:02:23 jmcneill Exp $ */
+/* $NetBSD: armreg.h,v 1.24 2019/03/20 07:16:07 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -71,6 +71,16 @@ reg_##regname##_write(uint64_t __val)
AARCH64REG_READ_INLINE2(regname, regdesc) \
AARCH64REG_WRITE_INLINE2(regname, regdesc)
+#define AARCH64REG_ATWRITE_INLINE2(regname, regdesc) \
+static __inline void \
+reg_##regname##_write(uint64_t __val) \
+{ \
+ __asm __volatile("at " #regdesc ", %0" :: "r"(__val)); \
+}
+
+#define AARCH64REG_ATWRITE_INLINE(regname) \
+ AARCH64REG_ATWRITE_INLINE2(regname, regname)
+
/*
* System registers available at EL0 (user)
*/
@@ -537,6 +547,11 @@ AARCH64REG_WRITE_INLINE(rmr_el1)
AARCH64REG_READ_INLINE(rvbar_el1) // Reset Vector Base Address Register
AARCH64REG_WRITE_INLINE(rvbar_el1)
+AARCH64REG_ATWRITE_INLINE(s1e0r); // Address Translate Stages 1
+AARCH64REG_ATWRITE_INLINE(s1e0w);
+AARCH64REG_ATWRITE_INLINE(s1e1r);
+AARCH64REG_ATWRITE_INLINE(s1e1w);
+
AARCH64REG_READ_INLINE(sctlr_el1) // System Control Register
AARCH64REG_WRITE_INLINE(sctlr_el1)
