Module Name: src Committed By: jmcneill Date: Fri Dec 27 18:56:47 UTC 2019
Modified Files: src/sys/arch/aarch64/aarch64: genassym.cf locore.S pmap.c src/sys/arch/aarch64/conf: files.aarch64 src/sys/arch/aarch64/include: armreg.h pmap.h Log Message: Enable early write acknowledge for device memory mappings. To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/aarch64/aarch64/genassym.cf cvs rdiff -u -r1.47 -r1.48 src/sys/arch/aarch64/aarch64/locore.S cvs rdiff -u -r1.56 -r1.57 src/sys/arch/aarch64/aarch64/pmap.c cvs rdiff -u -r1.14 -r1.15 src/sys/arch/aarch64/conf/files.aarch64 cvs rdiff -u -r1.28 -r1.29 src/sys/arch/aarch64/include/armreg.h cvs rdiff -u -r1.26 -r1.27 src/sys/arch/aarch64/include/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/aarch64/aarch64/genassym.cf diff -u src/sys/arch/aarch64/aarch64/genassym.cf:1.15 src/sys/arch/aarch64/aarch64/genassym.cf:1.16 --- src/sys/arch/aarch64/aarch64/genassym.cf:1.15 Sun Nov 24 11:23:16 2019 +++ src/sys/arch/aarch64/aarch64/genassym.cf Fri Dec 27 18:56:47 2019 @@ -1,4 +1,4 @@ -# $NetBSD: genassym.cf,v 1.15 2019/11/24 11:23:16 skrll Exp $ +# $NetBSD: genassym.cf,v 1.16 2019/12/27 18:56:47 jmcneill Exp $ #- # Copyright (c) 2014 The NetBSD Foundation, Inc. # All rights reserved. @@ -336,6 +336,7 @@ define MAIR_ATTR1 MAIR_ATTR1 define MAIR_ATTR2 MAIR_ATTR2 define MAIR_ATTR3 MAIR_ATTR3 define MAIR_DEVICE_nGnRnE MAIR_DEVICE_nGnRnE +define MAIR_DEVICE_nGnRE MAIR_DEVICE_nGnRE define MAIR_NORMAL_NC MAIR_NORMAL_NC define MAIR_NORMAL_WT MAIR_NORMAL_WT define MAIR_NORMAL_WB MAIR_NORMAL_WB Index: src/sys/arch/aarch64/aarch64/locore.S diff -u src/sys/arch/aarch64/aarch64/locore.S:1.47 src/sys/arch/aarch64/aarch64/locore.S:1.48 --- src/sys/arch/aarch64/aarch64/locore.S:1.47 Thu Dec 26 08:48:53 2019 +++ src/sys/arch/aarch64/aarch64/locore.S Fri Dec 27 18:56:47 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.S,v 1.47 2019/12/26 08:48:53 skrll Exp $ */ +/* $NetBSD: locore.S,v 1.48 2019/12/27 18:56:47 jmcneill Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu <r...@nerv.org> @@ -38,8 +38,13 @@ #include <aarch64/hypervisor.h> #include "assym.h" -RCSID("$NetBSD: locore.S,v 1.47 2019/12/26 08:48:53 skrll Exp $") +RCSID("$NetBSD: locore.S,v 1.48 2019/12/27 18:56:47 jmcneill Exp $") +#ifdef AARCH64_DEVICE_MEM_STRICTLY_ORDERED +#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE +#else +#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRE +#endif /*#define DEBUG_LOCORE /* debug print */ /*#define DEBUG_LOCORE_PRINT_LOCK /* avoid mixing AP's output */ @@ -948,7 +953,7 @@ mair_setting: __SHIFTIN(MAIR_NORMAL_WB, MAIR_ATTR0) | \ __SHIFTIN(MAIR_NORMAL_NC, MAIR_ATTR1) | \ __SHIFTIN(MAIR_NORMAL_WT, MAIR_ATTR2) | \ - __SHIFTIN(MAIR_DEVICE_nGnRnE, MAIR_ATTR3)) + __SHIFTIN(MAIR_DEVICE_MEM, MAIR_ATTR3)) #define VIRT_BIT 48 Index: src/sys/arch/aarch64/aarch64/pmap.c diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.56 src/sys/arch/aarch64/aarch64/pmap.c:1.57 --- src/sys/arch/aarch64/aarch64/pmap.c:1.56 Thu Dec 19 07:44:56 2019 +++ src/sys/arch/aarch64/aarch64/pmap.c Fri Dec 27 18:56:47 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.56 2019/12/19 07:44:56 skrll Exp $ */ +/* $NetBSD: pmap.c,v 1.57 2019/12/27 18:56:47 jmcneill Exp $ */ /* * Copyright (c) 2017 Ryo Shimizu <r...@nerv.org> @@ -27,7 +27,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.56 2019/12/19 07:44:56 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.57 2019/12/27 18:56:47 jmcneill Exp $"); #include "opt_arm_debug.h" #include "opt_ddb.h" @@ -953,7 +953,7 @@ _pmap_pte_adjust_cacheflags(pt_entry_t p switch (flags & (PMAP_CACHE_MASK|PMAP_DEV)) { case PMAP_DEV ... PMAP_DEV | PMAP_CACHE_MASK: - pte |= LX_BLKPAG_ATTR_DEVICE_MEM; /* nGnRnE */ + pte |= LX_BLKPAG_ATTR_DEVICE_MEM; /* Device-nGnRE */ break; case PMAP_NOCACHE: case PMAP_NOCACHE_OVR: Index: src/sys/arch/aarch64/conf/files.aarch64 diff -u src/sys/arch/aarch64/conf/files.aarch64:1.14 src/sys/arch/aarch64/conf/files.aarch64:1.15 --- src/sys/arch/aarch64/conf/files.aarch64:1.14 Wed Nov 20 19:37:51 2019 +++ src/sys/arch/aarch64/conf/files.aarch64 Fri Dec 27 18:56:47 2019 @@ -1,9 +1,10 @@ -# $NetBSD: files.aarch64,v 1.14 2019/11/20 19:37:51 pgoyette Exp $ +# $NetBSD: files.aarch64,v 1.15 2019/12/27 18:56:47 jmcneill Exp $ defflag opt_cpuoptions.h AARCH64_ALIGNMENT_CHECK defflag opt_cpuoptions.h AARCH64_EL0_STACK_ALIGNMENT_CHECK defflag opt_cpuoptions.h AARCH64_EL1_STACK_ALIGNMENT_CHECK defflag opt_cpuoptions.h AARCH64_HAVE_L2CTLR +defflag opt_cpuoptions.h AARCH64_DEVICE_MEM_STRICTLY_ORDERED defflag opt_cputypes.h CPU_ARMV8 defflag opt_cputypes.h CPU_CORTEX: CPU_ARMV8 Index: src/sys/arch/aarch64/include/armreg.h diff -u src/sys/arch/aarch64/include/armreg.h:1.28 src/sys/arch/aarch64/include/armreg.h:1.29 --- src/sys/arch/aarch64/include/armreg.h:1.28 Sun Sep 15 15:16:30 2019 +++ src/sys/arch/aarch64/include/armreg.h Fri Dec 27 18:56:47 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.28 2019/09/15 15:16:30 tnn Exp $ */ +/* $NetBSD: armreg.h,v 1.29 2019/12/27 18:56:47 jmcneill Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -523,6 +523,7 @@ AARCH64REG_WRITE_INLINE(mair_el1) #define MAIR_ATTR6 __BITS(55,48) #define MAIR_ATTR7 __BITS(63,56) #define MAIR_DEVICE_nGnRnE 0x00 // NoGathering,NoReordering,NoEarlyWriteAck. +#define MAIR_DEVICE_nGnRE 0x04 // NoGathering,NoReordering,EarlyWriteAck. #define MAIR_NORMAL_NC 0x44 #define MAIR_NORMAL_WT 0xbb #define MAIR_NORMAL_WB 0xff Index: src/sys/arch/aarch64/include/pmap.h diff -u src/sys/arch/aarch64/include/pmap.h:1.26 src/sys/arch/aarch64/include/pmap.h:1.27 --- src/sys/arch/aarch64/include/pmap.h:1.26 Tue Oct 29 20:01:22 2019 +++ src/sys/arch/aarch64/include/pmap.h Fri Dec 27 18:56:47 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.26 2019/10/29 20:01:22 maya Exp $ */ +/* $NetBSD: pmap.h,v 1.27 2019/12/27 18:56:47 jmcneill Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -240,7 +240,7 @@ aarch64_mmap_flags(paddr_t mdpgno) * WriteBack - write back cache * WriteThru - wite through cache * NoCache - no cache - * Device(nGnRnE) - no Gathering, no Reordering, no Early write ack + * Device(nGnRE) - no Gathering, no Reordering, Early write ack * * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags. */