Module Name: src
Committed By: jdolecek
Date: Tue Jul 28 09:36:05 UTC 2020
Modified Files:
src/sys/dev/ic: nvmevar.h
src/sys/dev/pci: nvme_pci.c
Log Message:
add a quirk to disable MSI, and enable it for Intel SSD DC P4500
this device seems to cause serious system responsiveness issues when configured
to use MSI, while it works fine when configured for either INTx or MSI-X
this is important so this works well under Xen Dom0, which doesn't
support MSI-X yet
fixes another issue reported as feedback for PR port-xen/55285 by Frank Kardel
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/dev/ic/nvmevar.h
cvs rdiff -u -r1.27 -r1.28 src/sys/dev/pci/nvme_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/ic/nvmevar.h
diff -u src/sys/dev/ic/nvmevar.h:1.20 src/sys/dev/ic/nvmevar.h:1.21
--- src/sys/dev/ic/nvmevar.h:1.20 Fri Jun 28 15:08:47 2019
+++ src/sys/dev/ic/nvmevar.h Tue Jul 28 09:36:05 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: nvmevar.h,v 1.20 2019/06/28 15:08:47 jmcneill Exp $ */
+/* $NetBSD: nvmevar.h,v 1.21 2020/07/28 09:36:05 jdolecek Exp $ */
/* $OpenBSD: nvmevar.h,v 1.8 2016/04/14 11:18:32 dlg Exp $ */
/*
@@ -140,6 +140,7 @@ struct nvme_softc {
uint32_t sc_quirks;
#define NVME_QUIRK_DELAY_B4_CHK_RDY __BIT(0)
+#define NVME_QUIRK_NOMSI __BIT(1)
char sc_modelname[81];
};
Index: src/sys/dev/pci/nvme_pci.c
diff -u src/sys/dev/pci/nvme_pci.c:1.27 src/sys/dev/pci/nvme_pci.c:1.28
--- src/sys/dev/pci/nvme_pci.c:1.27 Mon Dec 2 03:06:51 2019
+++ src/sys/dev/pci/nvme_pci.c Tue Jul 28 09:36:05 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: nvme_pci.c,v 1.27 2019/12/02 03:06:51 msaitoh Exp $ */
+/* $NetBSD: nvme_pci.c,v 1.28 2020/07/28 09:36:05 jdolecek Exp $ */
/* $OpenBSD: nvme_pci.c,v 1.3 2016/04/14 11:18:32 dlg Exp $ */
/*
@@ -43,7 +43,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nvme_pci.c,v 1.27 2019/12/02 03:06:51 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvme_pci.c,v 1.28 2020/07/28 09:36:05 jdolecek Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -108,6 +108,8 @@ static const struct nvme_pci_quirk {
NVME_QUIRK_DELAY_B4_CHK_RDY },
{ PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_172XAB,
NVME_QUIRK_DELAY_B4_CHK_RDY },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DC_P4500_SSD,
+ NVME_QUIRK_NOMSI },
};
static const struct nvme_pci_quirk *
@@ -158,6 +160,10 @@ nvme_pci_attach(device_t parent, device_
else
sc->sc_dmat = pa->pa_dmat;
+ quirk = nvme_pci_lookup_quirk(pa);
+ if (quirk != NULL)
+ sc->sc_quirks = quirk->quirks;
+
pci_aprint_devinfo(pa, NULL);
/* Map registers */
@@ -221,10 +227,6 @@ nvme_pci_attach(device_t parent, device_
sc->sc_softih = kmem_zalloc(
sizeof(*sc->sc_softih) * psc->psc_nintrs, KM_SLEEP);
- quirk = nvme_pci_lookup_quirk(pa);
- if (quirk != NULL)
- sc->sc_quirks = quirk->quirks;
-
if (nvme_attach(sc) != 0) {
/* error printed by nvme_attach() */
goto softintr_free;
@@ -412,6 +414,8 @@ nvme_pci_setup_intr(struct pci_attach_ar
}
/* MSI */
+ if (sc->sc_quirks & NVME_QUIRK_NOMSI)
+ goto force_intx;
counts[PCI_INTR_TYPE_MSI] = pci_msi_count(pa->pa_pc, pa->pa_tag);
if (counts[PCI_INTR_TYPE_MSI] > 0) {
while (counts[PCI_INTR_TYPE_MSI] > ncpu + 1) {
