Module Name: src
Committed By: msaitoh
Date: Sat Dec 26 06:02:42 UTC 2020
Modified Files:
src/sys/dev/pci/ixgbe: ixgbe.c
Log Message:
Check EICR's queue bit instead of IFF_RUNNING. This change fixes a bug that
it might incorrectly enable interrupt when IFF_RUNNING is not set. It also
changes that the TX/RX is not processed if a queue interrupt isn't occurred.
To generate a diff of this commit:
cvs rdiff -u -r1.271 -r1.272 src/sys/dev/pci/ixgbe/ixgbe.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/ixgbe/ixgbe.c
diff -u src/sys/dev/pci/ixgbe/ixgbe.c:1.271 src/sys/dev/pci/ixgbe/ixgbe.c:1.272
--- src/sys/dev/pci/ixgbe/ixgbe.c:1.271 Sat Dec 26 06:01:22 2020
+++ src/sys/dev/pci/ixgbe/ixgbe.c Sat Dec 26 06:02:42 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.c,v 1.271 2020/12/26 06:01:22 msaitoh Exp $ */
+/* $NetBSD: ixgbe.c,v 1.272 2020/12/26 06:02:42 msaitoh Exp $ */
/******************************************************************************
@@ -5154,7 +5154,6 @@ ixgbe_legacy_irq(void *arg)
struct ix_queue *que = arg;
struct adapter *adapter = que->adapter;
struct ixgbe_hw *hw = &adapter->hw;
- struct ifnet *ifp = adapter->ifp;
struct tx_ring *txr = adapter->tx_rings;
bool reenable_intr = true;
u32 eicr, eicr_mask;
@@ -5172,14 +5171,16 @@ ixgbe_legacy_irq(void *arg)
eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
adapter->stats.pf.legint.ev_count++;
- ++que->irqs.ev_count;
if (eicr == 0) {
adapter->stats.pf.intzero.ev_count++;
IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig);
return 0;
}
- if ((ifp->if_flags & IFF_RUNNING) != 0) {
+ /* Queue (0) intr */
+ if ((eicr & IXGBE_EIMC_RTX_QUEUE) != 0) {
+ ++que->irqs.ev_count;
+
/*
* The same as ixgbe_msix_que() about
* "que->txrx_use_workqueue".
