CVS commit: src/sys/arch/aarch64/aarch64

[Ryo Shimizu]

Module Name:    src
Committed By:   ryo
Date:           Mon Feb  1 18:12:11 UTC 2021

Modified Files:
        src/sys/arch/aarch64/aarch64: pmap.c

Log Message:
It is enough to make a page accessible instead of writable.
same fix as r1.76


To generate a diff of this commit:
cvs rdiff -u -r1.100 -r1.101 src/sys/arch/aarch64/aarch64/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.100 src/sys/arch/aarch64/aarch64/pmap.c:1.101
--- src/sys/arch/aarch64/aarch64/pmap.c:1.100	Sun Jan 31 04:51:29 2021
+++ src/sys/arch/aarch64/aarch64/pmap.c	Mon Feb  1 18:12:11 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.100 2021/01/31 04:51:29 ryo Exp $	*/
+/*	$NetBSD: pmap.c,v 1.101 2021/02/01 18:12:11 ryo Exp $	*/
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.100 2021/01/31 04:51:29 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.101 2021/02/01 18:12:11 ryo Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_ddb.h"
@@ -960,20 +960,17 @@ pmap_icache_sync_range(pmap_t pm, vaddr_
 			vaddr_t eob = (va + blocksize) & ~(blocksize - 1);
 			vsize_t len = ulmin(eva, eob) - va;
 
-			if (l3pte_writable(pte)) {
+			if (l3pte_readable(pte)) {
 				cpu_icache_sync_range(va, len);
 			} else {
 				/*
-				 * change to writable temporally
+				 * change to accessible temporally
 				 * to do cpu_icache_sync_range()
 				 */
-				pt_entry_t opte = pte;
-				pte = pte & ~(LX_BLKPAG_AF|LX_BLKPAG_AP);
-				pte |= (LX_BLKPAG_AF|LX_BLKPAG_AP_RW);
-				atomic_swap_64(ptep, pte);
+				atomic_swap_64(ptep, pte | LX_BLKPAG_AF);
 				AARCH64_TLBI_BY_ASID_VA(pm->pm_asid, va, true);
 				cpu_icache_sync_range(va, len);
-				atomic_swap_64(ptep, opte);
+				atomic_swap_64(ptep, pte);
 				AARCH64_TLBI_BY_ASID_VA(pm->pm_asid, va, true);
 			}
 		}