Module Name: src
Committed By: matt
Date: Tue Feb 23 20:25:57 UTC 2010
Modified Files:
src/sys/arch/mips/adm5120 [matt-nb5-mips64]: adm5120_intr.c
src/sys/arch/mips/alchemy [matt-nb5-mips64]: au_icu.c
src/sys/arch/mips/atheros [matt-nb5-mips64]: ar5312_intr.c
ar5315_intr.c
Log Message:
Instead of a read-only ipl_sr_bits, define a ipl_sr_map struct and fill that
in the interrupt init routine. There's a default ipl_sr_map will operate
correctly, but isn't performant.
To generate a diff of this commit:
cvs rdiff -u -r1.3.18.2 -r1.3.18.3 src/sys/arch/mips/adm5120/adm5120_intr.c
cvs rdiff -u -r1.23.18.1 -r1.23.18.2 src/sys/arch/mips/alchemy/au_icu.c
cvs rdiff -u -r1.6.28.2 -r1.6.28.3 src/sys/arch/mips/atheros/ar5312_intr.c
cvs rdiff -u -r1.5.28.2 -r1.5.28.3 src/sys/arch/mips/atheros/ar5315_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/adm5120/adm5120_intr.c
diff -u src/sys/arch/mips/adm5120/adm5120_intr.c:1.3.18.2 src/sys/arch/mips/adm5120/adm5120_intr.c:1.3.18.3
--- src/sys/arch/mips/adm5120/adm5120_intr.c:1.3.18.2 Tue Feb 16 08:13:57 2010
+++ src/sys/arch/mips/adm5120/adm5120_intr.c Tue Feb 23 20:25:57 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: adm5120_intr.c,v 1.3.18.2 2010/02/16 08:13:57 matt Exp $ */
+/* $NetBSD: adm5120_intr.c,v 1.3.18.3 2010/02/23 20:25:57 matt Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -67,7 +67,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: adm5120_intr.c,v 1.3.18.2 2010/02/16 08:13:57 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: adm5120_intr.c,v 1.3.18.3 2010/02/23 20:25:57 matt Exp $");
#include "opt_ddb.h"
@@ -92,15 +92,17 @@
* This is a mask of bits to clear in the SR when we go to a
* given hardware interrupt priority level.
*/
-const uint32_t ipl_sr_bits[_IPL_N] = {
- [IPL_NONE] = 0,
- [IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
- [IPL_SOFTBIO] = MIPS_SOFT_INT_MASK_0,
- [IPL_SOFTNET] = MIPS_SOFT_INT_MASK,
- [IPL_SOFTSERIAL] = MIPS_SOFT_INT_MASK,
- [IPL_VM] = MIPS_SOFT_INT_MASK|MIPS_INT_MASK_0,
- [IPL_SCHED] = MIPS_INT_MASK,
- [IPL_HIGH] = MIPS_INT_MASK,
+static const struct ipl_sr_map adm5120_ipl_sr_map = {
+ .sr_bits = {
+ [IPL_NONE] = 0,
+ [IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
+ [IPL_SOFTBIO] = MIPS_SOFT_INT_MASK_0,
+ [IPL_SOFTNET] = MIPS_SOFT_INT_MASK,
+ [IPL_SOFTSERIAL] = MIPS_SOFT_INT_MASK,
+ [IPL_VM] = MIPS_SOFT_INT_MASK|MIPS_INT_MASK_0,
+ [IPL_SCHED] = MIPS_INT_MASK,
+ [IPL_HIGH] = MIPS_INT_MASK,
+ },
};
#define NIRQS 32
@@ -164,15 +166,15 @@
void
evbmips_intr_init(void)
{
- int i;
+ ipl_sr_map = adm5120_ipl_sr_map;
- for (i = 0; i < NINTRS; i++) {
+ for (size_t i = 0; i < NINTRS; i++) {
LIST_INIT(&adm5120_cpuintrs[i].cintr_list);
evcnt_attach_dynamic(&adm5120_cpuintrs[i].cintr_count,
EVCNT_TYPE_INTR, NULL, "mips", adm5120_cpuintrnames[i]);
}
- for (i = 0; i < NIRQS; i++) {
+ for (size_t i = 0; i < NIRQS; i++) {
/* XXX steering - use an irqmap array? */
adm5120_intrtab[i].intr_refcnt = 0;
Index: src/sys/arch/mips/alchemy/au_icu.c
diff -u src/sys/arch/mips/alchemy/au_icu.c:1.23.18.1 src/sys/arch/mips/alchemy/au_icu.c:1.23.18.2
--- src/sys/arch/mips/alchemy/au_icu.c:1.23.18.1 Mon Feb 15 07:37:36 2010
+++ src/sys/arch/mips/alchemy/au_icu.c Tue Feb 23 20:25:57 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: au_icu.c,v 1.23.18.1 2010/02/15 07:37:36 matt Exp $ */
+/* $NetBSD: au_icu.c,v 1.23.18.2 2010/02/23 20:25:57 matt Exp $ */
/*-
* Copyright (c) 2006 Itronix Inc.
@@ -68,7 +68,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: au_icu.c,v 1.23.18.1 2010/02/15 07:37:36 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: au_icu.c,v 1.23.18.2 2010/02/23 20:25:57 matt Exp $");
#include "opt_ddb.h"
@@ -93,21 +93,17 @@
* given hardware interrupt priority level.
*/
-const uint32_t ipl_sr_bits[_IPL_N] = {
- 0, /* 0: IPL_NONE */
- MIPS_SOFT_INT_MASK_0, /* 1: IPL_SOFTCLOCK */
- MIPS_SOFT_INT_MASK_0, /* 2: IPL_SOFTNET */
- MIPS_SOFT_INT_MASK_0|
- MIPS_SOFT_INT_MASK_1|
- MIPS_INT_MASK_0, /* 3: IPL_VM */
- MIPS_SOFT_INT_MASK_0|
- MIPS_SOFT_INT_MASK_1|
- MIPS_INT_MASK_0|
- MIPS_INT_MASK_1|
- MIPS_INT_MASK_2|
- MIPS_INT_MASK_3|
- MIPS_INT_MASK_4|
- MIPS_INT_MASK_5, /* 4: IPL_{SCHED,HIGH} */
+static const struct ipl_sr_map alchemy_ipl_sr_map = {
+ .sr_bits = {
+ [IPL_NONE] = 0,
+ [IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
+ [IPL_SOFTBIO] = MIPS_SOFT_INT_MASK_0,
+ [IPL_SOFTNET] = MIPS_SOFT_INT_MASK,
+ [IPL_SOFTSERIAL] = MIPS_SOFT_INT_MASK,
+ [IPL_VM] = MIPS_SOFT_INT_MASK|MIPS_INT_MASK_0,
+ [IPL_SCHED] = MIPS_INT_MASK,
+ [IPL_HIGH] = MIPS_INT_MASK,
+ },
};
#define NIRQS 64
@@ -134,7 +130,7 @@
};
struct au_cpuintr au_cpuintrs[NINTRS];
-const char *au_cpuintrnames[NINTRS] = {
+const char * const au_cpuintrnames[NINTRS] = {
"icu 0, req 0",
"icu 0, req 1",
"icu 1, req 0",
@@ -146,22 +142,21 @@
void
au_intr_init(void)
{
- int i;
- struct au_chipdep *chip;
+ ipl_sr_map = alchemy_ipl_sr_map;
- for (i = 0; i < NINTRS; i++) {
+ for (size_t i = 0; i < NINTRS; i++) {
LIST_INIT(&au_cpuintrs[i].cintr_list);
evcnt_attach_dynamic(&au_cpuintrs[i].cintr_count,
EVCNT_TYPE_INTR, NULL, "mips", au_cpuintrnames[i]);
}
- chip = au_chipdep();
+ struct au_chipdep * const chip = au_chipdep();
KASSERT(chip != NULL);
ic0_base = chip->icus[0];
ic1_base = chip->icus[1];
- for (i = 0; i < NIRQS; i++) {
+ for (size_t i = 0; i < NIRQS; i++) {
au_icu_intrtab[i].intr_refcnt = 0;
evcnt_attach_dynamic(&au_icu_intrtab[i].intr_count,
EVCNT_TYPE_INTR, NULL, chip->name, chip->irqnames[i]);
Index: src/sys/arch/mips/atheros/ar5312_intr.c
diff -u src/sys/arch/mips/atheros/ar5312_intr.c:1.6.28.2 src/sys/arch/mips/atheros/ar5312_intr.c:1.6.28.3
--- src/sys/arch/mips/atheros/ar5312_intr.c:1.6.28.2 Tue Feb 16 08:13:57 2010
+++ src/sys/arch/mips/atheros/ar5312_intr.c Tue Feb 23 20:25:57 2010
@@ -1,4 +1,4 @@
-/* $Id: ar5312_intr.c,v 1.6.28.2 2010/02/16 08:13:57 matt Exp $ */
+/* $Id: ar5312_intr.c,v 1.6.28.3 2010/02/23 20:25:57 matt Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ar5312_intr.c,v 1.6.28.2 2010/02/16 08:13:57 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ar5312_intr.c,v 1.6.28.3 2010/02/23 20:25:57 matt Exp $");
#include <sys/param.h>
#include <sys/queue.h>
@@ -90,16 +90,19 @@
struct evcnt intr_count;
};
-const uint32_t ipl_sr_bits[_IPL_N] = {
- [IPL_NONE] = 0,
- [IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
- [IPL_SOFTBIO] = MIPS_SOFT_INT_MASK_0,
- [IPL_SOFTNET] = MIPS_SOFT_INT_MASK,
- [IPL_SOFTSERIAL] = MIPS_SOFT_INT_MASK,
- [IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
- | MIPS_INT_MASK_1 | MIPS_INT_MASK_2 | MIPS_INT_MASK_3,
- [IPL_SCHED] = MIPS_INT_MASK,
- [IPL_HIGH] = MIPS_INT_MASK,
+static const struct ipl_sr_map ar5312_ipl_sr_map = {
+ .sr_bits = {
+ [IPL_NONE] = 0,
+ [IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
+ [IPL_SOFTBIO] = MIPS_SOFT_INT_MASK_0,
+ [IPL_SOFTNET] = MIPS_SOFT_INT_MASK,
+ [IPL_SOFTSERIAL] = MIPS_SOFT_INT_MASK,
+ [IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
+ | MIPS_INT_MASK_1 | MIPS_INT_MASK_2
+ | MIPS_INT_MASK_3,
+ [IPL_SCHED] = MIPS_INT_MASK,
+ [IPL_HIGH] = MIPS_INT_MASK,
+ },
};
static const char * const ar5312_cpuintrnames[NINTRS] = {
@@ -128,15 +131,15 @@
void
ar531x_intr_init(void)
{
- int i;
+ ipl_sr_map = ar5312_ipl_sr_map;
- for (i = 0; i < NINTRS; i++) {
+ for (size_t i = 0; i < NINTRS; i++) {
LIST_INIT(&ar5312_cpuintrs[i].intr_l);
evcnt_attach_dynamic(&ar5312_cpuintrs[i].intr_count,
EVCNT_TYPE_INTR, NULL, "mips", ar5312_cpuintrnames[i]);
}
- for (i = 0; i < NIRQS; i++) {
+ for (size_t i = 0; i < NIRQS; i++) {
LIST_INIT(&ar5312_miscintrs[i].intr_l);
evcnt_attach_dynamic(&ar5312_miscintrs[i].intr_count,
EVCNT_TYPE_INTR, NULL, "ar5312", ar5312_miscintrnames[i]);
Index: src/sys/arch/mips/atheros/ar5315_intr.c
diff -u src/sys/arch/mips/atheros/ar5315_intr.c:1.5.28.2 src/sys/arch/mips/atheros/ar5315_intr.c:1.5.28.3
--- src/sys/arch/mips/atheros/ar5315_intr.c:1.5.28.2 Tue Feb 16 08:13:57 2010
+++ src/sys/arch/mips/atheros/ar5315_intr.c Tue Feb 23 20:25:57 2010
@@ -1,4 +1,4 @@
-/* $Id: ar5315_intr.c,v 1.5.28.2 2010/02/16 08:13:57 matt Exp $ */
+/* $Id: ar5315_intr.c,v 1.5.28.3 2010/02/23 20:25:57 matt Exp $ */
/*
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ar5315_intr.c,v 1.5.28.2 2010/02/16 08:13:57 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ar5315_intr.c,v 1.5.28.3 2010/02/23 20:25:57 matt Exp $");
#include <sys/param.h>
#include <sys/queue.h>
@@ -88,16 +88,18 @@
struct evcnt intr_count;
};
-const uint32_t ipl_sr_bits[_IPL_N] = {
- [IPL_NONE] = 0,
- [IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
- [IPL_SOFTBIO] = MIPS_SOFT_INT_MASK_0,
- [IPL_SOFTNET] = MIPS_SOFT_INT_MASK,
- [IPL_SOFTSERIAL] = MIPS_SOFT_INT_MASK,
- [IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
- | MIPS_INT_MASK_1 | MIPS_INT_MASK_2,
- [IPL_SCHED] = MIPS_INT_MASK,
- [IPL_HIGH] = MIPS_INT_MASK,
+static const struct ipl_sr_map ar5315_ipl_sr_map = {
+ .sr_bits = {
+ [IPL_NONE] = 0,
+ [IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
+ [IPL_SOFTBIO] = MIPS_SOFT_INT_MASK_0,
+ [IPL_SOFTNET] = MIPS_SOFT_INT_MASK,
+ [IPL_SOFTSERIAL] = MIPS_SOFT_INT_MASK,
+ [IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
+ | MIPS_INT_MASK_1 | MIPS_INT_MASK_2,
+ [IPL_SCHED] = MIPS_INT_MASK,
+ [IPL_HIGH] = MIPS_INT_MASK,
+ },
};
static const char * const ar5315_cpuintrnames[NINTRS] = {
@@ -126,15 +128,15 @@
void
ar531x_intr_init(void)
{
- int i;
+ ipl_sr_map = ar5315_ipl_sr_map;
- for (i = 0; i < NINTRS; i++) {
+ for (size_t i = 0; i < NINTRS; i++) {
LIST_INIT(&ar5315_cpuintrs[i].intr_l);
evcnt_attach_dynamic(&ar5315_cpuintrs[i].intr_count,
EVCNT_TYPE_INTR, NULL, "mips", ar5315_cpuintrnames[i]);
}
- for (i = 0; i < NIRQS; i++) {
+ for (size_t i = 0; i < NIRQS; i++) {
LIST_INIT(&ar5315_miscintrs[i].intr_l);
evcnt_attach_dynamic(&ar5315_miscintrs[i].intr_count,
EVCNT_TYPE_INTR, NULL, "ar5315", ar5315_miscintrnames[i]);
