Module Name: src
Committed By: simonb
Date: Mon Apr 5 07:00:06 UTC 2021
Modified Files:
src/sys/arch/mips/include: mips_opcode.h
src/sys/arch/mips/mips: db_disasm.c
Log Message:
Tidy up NOP disassembly, handle "pause" as well.
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/mips/include/mips_opcode.h
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/mips/mips/db_disasm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/mips_opcode.h
diff -u src/sys/arch/mips/include/mips_opcode.h:1.24 src/sys/arch/mips/include/mips_opcode.h:1.25
--- src/sys/arch/mips/include/mips_opcode.h:1.24 Mon Aug 17 03:14:08 2020
+++ src/sys/arch/mips/include/mips_opcode.h Mon Apr 5 07:00:06 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_opcode.h,v 1.24 2020/08/17 03:14:08 mrg Exp $ */
+/* $NetBSD: mips_opcode.h,v 1.25 2021/04/05 07:00:06 simonb Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -292,6 +292,15 @@ typedef union {
#define OP_DSRA32 077 /* MIPS-II, for r4000 port */
/*
+ * Subvalues for SLL where the source and destination registers
+ * are both zero.
+ */
+#define OP_SLL_NOP 0
+#define OP_SLL_SSNOP 1
+#define OP_SLL_EHB 3
+#define OP_SLL_PAUSE 5
+
+/*
* Values for the 'func' field when 'op' == OP_SPECIAL2.
*/
#define OP_MADD 000 /* QED */
Index: src/sys/arch/mips/mips/db_disasm.c
diff -u src/sys/arch/mips/mips/db_disasm.c:1.37 src/sys/arch/mips/mips/db_disasm.c:1.38
--- src/sys/arch/mips/mips/db_disasm.c:1.37 Mon Apr 5 06:38:01 2021
+++ src/sys/arch/mips/mips/db_disasm.c Mon Apr 5 07:00:06 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: db_disasm.c,v 1.37 2021/04/05 06:38:01 simonb Exp $ */
+/* $NetBSD: db_disasm.c,v 1.38 2021/04/05 07:00:06 simonb Exp $ */
/*-
* Copyright (c) 1991, 1993
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.37 2021/04/05 06:38:01 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.38 2021/04/05 07:00:06 simonb Exp $");
#include <sys/param.h>
#include <sys/cpu.h>
@@ -265,18 +265,32 @@ db_disasm_insn(int insn, db_addr_t loc,
switch (i.JType.op) {
case OP_SPECIAL: {
const char *name = spec_name[i.RType.func];
- if (i.word == 0) {
- db_printf("nop");
- break;
- }
- if (i.word == (1 << 6)) {
- db_printf("ssnop");
- break;
- }
- if (i.word == (3 << 6)) {
- db_printf("ehb");
+
+ /* Handle varations of NOPs */
+ if ((i.RType.func == OP_SLL) &&
+ (i.RType.rs == 0) &&
+ (i.RType.rt == 0) &&
+ (i.RType.rd == 0)) {
+ switch (i.RType.shamt) {
+ case OP_SLL_NOP:
+ db_printf("nop");
+ break;
+ case OP_SLL_SSNOP:
+ db_printf("ssnop");
+ break;
+ case OP_SLL_EHB:
+ db_printf("ehb");
+ break;
+ case OP_SLL_PAUSE:
+ db_printf("pause");
+ break;
+ default:
+ db_printf("nop *"); /* "undefined" NOP */
+ break;
+ }
break;
}
+
/*
* The following are equivalents of a "move dst,src":
* addu dst,src,zero (in 32-bit mode)
@@ -296,6 +310,7 @@ db_disasm_insn(int insn, db_addr_t loc,
reg_name[i.RType.rs]);
break;
}
+
if ((i.RType.func == OP_SRL || i.RType.func == OP_SRLV)
&& i.RType.rs == 1) {
name = (i.RType.func == OP_SRL) ? "rotr" : "rotrv";
