Module Name: src
Committed By: cliff
Date: Thu Jun 10 00:33:51 UTC 2010
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: trap.c
Log Message:
- in trap(), if traptype is bus error, call chip-specific bus error
handler in locoresw: (*mips_locoresw.lsw_bus_error)(cause)
To generate a diff of this commit:
cvs rdiff -u -r1.217.12.26 -r1.217.12.27 src/sys/arch/mips/mips/trap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/trap.c
diff -u src/sys/arch/mips/mips/trap.c:1.217.12.26 src/sys/arch/mips/mips/trap.c:1.217.12.27
--- src/sys/arch/mips/mips/trap.c:1.217.12.26 Thu May 6 05:31:49 2010
+++ src/sys/arch/mips/mips/trap.c Thu Jun 10 00:33:50 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.217.12.26 2010/05/06 05:31:49 matt Exp $ */
+/* $NetBSD: trap.c,v 1.217.12.27 2010/06/10 00:33:50 cliff Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -78,7 +78,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.217.12.26 2010/05/06 05:31:49 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.217.12.27 2010/06/10 00:33:50 cliff Exp $");
#include "opt_cputype.h" /* which mips CPU levels do we support? */
#include "opt_ddb.h"
@@ -235,7 +235,10 @@
printf(" tf=%p ksp=%p ra=%#" PRIxREGISTER "\n",
tf, tf+1, tf->tf_regs[_R_RA]);
}
-
+
+ if ((TRAPTYPE(cause) == 6) || (TRAPTYPE(cause) == 7))
+ (void)(*mips_locoresw.lsw_bus_error)(cause);
+
#if defined(DDB)
kdb_trap(type, &tf->tf_registers);
/* XXX force halt XXX */
