Module Name: src
Committed By: mrg
Date: Thu May 12 05:42:42 UTC 2011
Modified Files:
src/sys/arch/sparc64/sparc64: cache.h
Log Message:
first steps towards fujitsu SPARC64 support:
- sun4us and sun4v systems don't need dcache_flush_page or
blast_icache ops
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/sparc64/sparc64/cache.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sparc64/sparc64/cache.h
diff -u src/sys/arch/sparc64/sparc64/cache.h:1.18 src/sys/arch/sparc64/sparc64/cache.h:1.19
--- src/sys/arch/sparc64/sparc64/cache.h:1.18 Sun Mar 28 05:24:00 2010
+++ src/sys/arch/sparc64/sparc64/cache.h Thu May 12 05:42:42 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: cache.h,v 1.18 2010/03/28 05:24:00 mrg Exp $ */
+/* $NetBSD: cache.h,v 1.19 2011/05/12 05:42:42 mrg Exp $ */
/*
* Copyright (c) 1996
@@ -93,6 +93,8 @@
static __inline__ void
dcache_flush_page(paddr_t pa)
{
+ if (CPU_ISSUN4US || CPU_ISSUN4V)
+ return;
if (CPU_IS_USIII_UP())
dcache_flush_page_usiii(pa);
else
@@ -111,6 +113,8 @@
static __inline__ void
blast_icache(void)
{
+ if (CPU_ISSUN4US || CPU_ISSUN4V)
+ return;
if (CPU_IS_USIII_UP())
blast_icache_usiii();
else
@@ -154,6 +158,12 @@
#define tlb_flush_pte(va,pm) sp_tlb_flush_pte(va, (pm)->pm_ctx[0])
#define dcache_flush_page_all(pa) dcache_flush_page(pa)
#define dcache_flush_page_cpuset(pa,cs) dcache_flush_page(pa)
-#define blast_dcache() sp_blast_dcache(dcache_size, \
- dcache_line_size)
+
+static __inline__ void
+blast_dcache(void)
+{
+ if (CPU_ISSUN4US || CPU_ISSUN4V)
+ return;
+ sp_blast_dcache(dcache_size, dcache_line_size);
+}
#endif
