CVS commit: src/sys/arch/sparc64/sparc64

[matthew green]

Module Name:    src
Committed By:   mrg
Date:           Thu May 12 05:43:40 UTC 2011

Modified Files:
        src/sys/arch/sparc64/sparc64: ipifuncs.c

Log Message:
first steps towards fujitsu SPARC64 support:

- use CPU_IS_USIIIi()
- only apply spitfire erratum #54 on CPU_IS_SPITFIRE() systems (this faults
  on SPARC64 cpus)
- sun4us and sun4v systems don't need dcache_flush_page or
  blast_dcache ops


To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/sparc64/sparc64/ipifuncs.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/arch/sparc64/sparc64/ipifuncs.c
diff -u src/sys/arch/sparc64/sparc64/ipifuncs.c:1.39 src/sys/arch/sparc64/sparc64/ipifuncs.c:1.40
--- src/sys/arch/sparc64/sparc64/ipifuncs.c:1.39	Tue Jun 22 18:29:02 2010
+++ src/sys/arch/sparc64/sparc64/ipifuncs.c	Thu May 12 05:43:40 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: ipifuncs.c,v 1.39 2010/06/22 18:29:02 rmind Exp $ */
+/*	$NetBSD: ipifuncs.c,v 1.40 2011/05/12 05:43:40 mrg Exp $ */
 
 /*-
  * Copyright (c) 2004 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.39 2010/06/22 18:29:02 rmind Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.40 2011/05/12 05:43:40 mrg Exp $");
 
 #include "opt_ddb.h"
 
@@ -213,7 +213,7 @@
 	 * UltraSPARC-IIIi CPUs select the BUSY/NACK pair based on the
 	 * lower two bits of the ITID.
 	 */
-	if (CPU_IS_JALAPENO())
+	if (CPU_IS_USIIIi())
 		shift = (upaid & 0x3) * 2;
 
 	if (ldxa(0, ASR_IDSR) & (IDSR_BUSY << shift))
@@ -231,8 +231,10 @@
 		stxa(IDCR(upaid), ASI_INTERRUPT_DISPATCH, 0);
 		membar_sync();
 		/* Workaround for SpitFire erratum #54, from FreeBSD */
-		(void)ldxa(P_DCR_0, ASI_INTERRUPT_RECEIVE_DATA);
-		membar_sync();
+		if (CPU_IS_SPITFIRE()) {
+			(void)ldxa(P_DCR_0, ASI_INTERRUPT_RECEIVE_DATA);
+			membar_sync();
+		}
 
 		for (ik = 0; ik < 1000000; ik++) {
 			if (ldxa(0, ASR_IDSR) & (IDSR_BUSY << shift))
@@ -420,6 +422,9 @@
 {
 	ipifunc_t func;
 
+	if (CPU_ISSUN4US || CPU_ISSUN4V)
+		return;
+
 	if (CPU_IS_USIII_UP())
 		func = sparc64_ipi_dcache_flush_page_usiii;
 	else
@@ -436,6 +441,9 @@
 smp_blast_dcache(sparc64_cpuset_t activecpus)
 {
 
+	if (CPU_ISSUN4US || CPU_ISSUN4V)
+		return;
+
 	sparc64_multicast_ipi(activecpus, sparc64_ipi_blast_dcache,
 			      dcache_size, dcache_line_size);
 	sp_blast_dcache(dcache_size, dcache_line_size);