Module Name: src
Committed By: matt
Date: Wed Aug 29 07:14:06 UTC 2012
Modified Files:
src/sys/arch/arm/arm: arm_machdep.c cpufunc.c
src/sys/arch/arm/arm32: cpuswitch.S locore.S
src/sys/arch/arm/conf: files.arm
src/sys/arch/arm/include: cpu.h
src/sys/arch/evbarm/conf: std.beagle std.igepv2 std.overo std.tisdp24xx
Log Message:
Rename ARM options PROCESS_ID_IS_CUR{CPU,LWP} to TPIDRPRW_IS_CUR{CPU,LWP}
since TPIDRPRW is the cp15 register name.
Initialize it early in start along with CI_ARM_CPUID.
Remove other initializations.
We alays have ci_curlwp.
Enable TIPRPRW_IS_CURCPU in std.beagle.
[tested on a beaglboard (cortex-a8)]
To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/arm/arm_machdep.c
cvs rdiff -u -r1.110 -r1.111 src/sys/arch/arm/arm/cpufunc.c
cvs rdiff -u -r1.66 -r1.67 src/sys/arch/arm/arm32/cpuswitch.S
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/arm32/locore.S
cvs rdiff -u -r1.108 -r1.109 src/sys/arch/arm/conf/files.arm
cvs rdiff -u -r1.68 -r1.69 src/sys/arch/arm/include/cpu.h
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/evbarm/conf/std.beagle
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbarm/conf/std.igepv2 \
src/sys/arch/evbarm/conf/std.overo
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/evbarm/conf/std.tisdp24xx
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/arm_machdep.c
diff -u src/sys/arch/arm/arm/arm_machdep.c:1.33 src/sys/arch/arm/arm/arm_machdep.c:1.34
--- src/sys/arch/arm/arm/arm_machdep.c:1.33 Thu Aug 16 17:35:01 2012
+++ src/sys/arch/arm/arm/arm_machdep.c Wed Aug 29 07:14:03 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: arm_machdep.c,v 1.33 2012/08/16 17:35:01 matt Exp $ */
+/* $NetBSD: arm_machdep.c,v 1.34 2012/08/29 07:14:03 matt Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -78,7 +78,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.33 2012/08/16 17:35:01 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.34 2012/08/29 07:14:03 matt Exp $");
#include <sys/exec.h>
#include <sys/proc.h>
@@ -103,9 +103,7 @@ char machine_arch[] = MACHINE_ARCH; /* f
/* Our exported CPU info; we can have only one. */
struct cpu_info cpu_info_store = {
.ci_cpl = IPL_HIGH,
-#ifndef PROCESS_ID_IS_CURLWP
.ci_curlwp = &lwp0,
-#endif
};
const pcu_ops_t * const pcu_ops_md_defs[PCU_UNIT_COUNT] = {
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.110 src/sys/arch/arm/arm/cpufunc.c:1.111
--- src/sys/arch/arm/arm/cpufunc.c:1.110 Thu Aug 16 18:22:38 2012
+++ src/sys/arch/arm/arm/cpufunc.c Wed Aug 29 07:14:03 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.110 2012/08/16 18:22:38 matt Exp $ */
+/* $NetBSD: cpufunc.c,v 1.111 2012/08/29 07:14:03 matt Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.110 2012/08/16 18:22:38 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.111 2012/08/29 07:14:03 matt Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -2697,14 +2697,6 @@ arm11_setup(char *args)
{
int cpuctrl, cpuctrlmask;
-#if defined(PROCESS_ID_IS_CURCPU)
- /* set curcpu() */
- __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&cpu_info_store));
-#elif defined(PROCESS_ID_IS_CURLWP)
- /* set curlwp() */
- __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&lwp0));
-#endif
-
cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
/* | CPU_CONTROL_BPRD_ENABLE */;
@@ -2752,14 +2744,6 @@ arm11mpcore_setup(char *args)
{
int cpuctrl, cpuctrlmask;
-#if defined(PROCESS_ID_IS_CURCPU)
- /* set curcpu() */
- __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&cpu_info_store));
-#elif defined(PROCESS_ID_IS_CURLWP)
- /* set curlwp() */
- __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&lwp0));
-#endif
-
cpuctrl = CPU_CONTROL_IC_ENABLE
| CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_BPRD_ENABLE ;
@@ -2815,14 +2799,6 @@ armv7_setup(char *args)
{
int cpuctrl, cpuctrlmask;
-#if defined(PROCESS_ID_IS_CURCPU)
- /* set curcpu() */
- __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&cpu_info_store));
-#elif defined(PROCESS_ID_IS_CURLWP)
- /* set curlwp() */
- __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&lwp0));
-#endif
-
cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_IC_ENABLE
| CPU_CONTROL_DC_ENABLE | CPU_CONTROL_BPRD_ENABLE ;
cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
@@ -2911,14 +2887,6 @@ arm11x6_setup(char *args)
uint32_t sbz=0;
uint32_t cpuid;
-#if defined(PROCESS_ID_IS_CURCPU)
- /* set curcpu() */
- __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&cpu_info_store));
-#elif defined(PROCESS_ID_IS_CURLWP)
- /* set curlwp() */
- __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&lwp0));
-#endif
-
cpuid = cpu_id();
cpuctrl =
Index: src/sys/arch/arm/arm32/cpuswitch.S
diff -u src/sys/arch/arm/arm32/cpuswitch.S:1.66 src/sys/arch/arm/arm32/cpuswitch.S:1.67
--- src/sys/arch/arm/arm32/cpuswitch.S:1.66 Thu Aug 16 17:35:01 2012
+++ src/sys/arch/arm/arm32/cpuswitch.S Wed Aug 29 07:14:04 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.66 2012/08/16 17:35:01 matt Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.67 2012/08/29 07:14:04 matt Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -89,7 +89,7 @@
#include <machine/asm.h>
#include <machine/cpu.h>
- RCSID("$NetBSD: cpuswitch.S,v 1.66 2012/08/16 17:35:01 matt Exp $")
+ RCSID("$NetBSD: cpuswitch.S,v 1.67 2012/08/29 07:14:04 matt Exp $")
/* LINTSTUB: include <sys/param.h> */
@@ -140,9 +140,9 @@ ENTRY(cpu_switchto)
mov r6, r1
mov r4, r0
-#ifdef PROCESS_ID_CURCPU
+#ifdef TPIDRPRW_ID_IS_CURCPU
GET_CURCPU(r7)
-#elif defined(PROCESS_ID_IS_CURLWP)
+#elif defined(TPIDRPRW_IS_CURLWP)
mcr p15, 0, r0, c13, c0, 4 /* get old lwp (r4 maybe 0) */
ldr r7, [r0, #(L_CPU)] /* get cpu from old lwp */
#elif !defined(MULTIPROCESSOR)
@@ -165,13 +165,11 @@ ENTRY(cpu_switchto)
/* l->l_cpu initialized in fork1() for single-processor */
#endif
-#if defined(PROCESS_ID_IS_CURLWP)
+#if defined(TPIDRPRW_IS_CURLWP)
mcr p15, 0, r6, c13, c0, 4 /* set current lwp */
#endif
-#if !defined(PROCESS_ID_IS_CURLWP) || defined(MULTIPROCESSOR)
/* We have a new curlwp now so make a note it */
str r6, [r7, #(CI_CURLWP)]
-#endif
/* Get the new pcb */
ldr r7, [r6, #(L_PCB)]
@@ -305,6 +303,10 @@ ENTRY(cpu_switchto)
/* lwp_trampoline expects new lwp as it's second argument */
mov r1, r6
+#ifdef _ARM_ARCH_7
+ clrex /* cause any subsequent STREX* to fail */
+#endif
+
/*
* Pull the registers that got pushed when cpu_switchto() was called,
* and return.
@@ -323,22 +325,29 @@ ENTRY(cpu_switchto)
ENTRY(lwp_trampoline)
/*
* cpu_switchto gives us:
- *
- * arg0(r0) = old lwp
- * arg1(r1) = new lwp
+ * arg0(r0) = old lwp
+ * arg1(r1) = new lwp
+ * setup by cpu_lwp_fork:
+ * r4 = func to call
+ * r5 = arg to func
+ * r6 = <unused>
+ * r7 = spsr mode
*/
bl _C_LABEL(lwp_startup)
mov r0, r5
mov r1, sp
+#ifdef _ARM_ARCH_4T
+ blx r4
+#else
mov lr, pc
mov pc, r4
+#endif
- /* Kill irq's */
- mrs r0, cpsr
- orr r0, r0, #(IF32_bits)
- msr cpsr_c, r0
+ GET_CPSR(r0)
+ CPSID_I(r0, r0) /* Kill irq's */
+ DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
PULLFRAME
movs pc, lr /* Exit */
@@ -353,7 +362,7 @@ ENTRY_NP(softint_switch)
stmfd sp!, {r4, r6, r7, lr}
ldr r7, [r0, #L_CPU] /* get curcpu */
-#if defined(PROCESS_ID_IS_CURLWP)
+#if defined(TPIDRPRW_IS_CURLWP)
mrc p15, 0, r4, c13, c0, 4 /* get old lwp */
#else
ldr r4, [r7, #(CI_CURLWP)] /* get old lwp */
@@ -391,12 +400,10 @@ ENTRY_NP(softint_switch)
/*
* We're switching to a bound LWP so its l_cpu is already correct.
*/
-#if defined(PROCESS_ID_IS_CURLWP)
+#if defined(TPIDRPRW_IS_CURLWP)
mcr p15, 0, r5, c13, c0, 4 /* save new lwp */
#endif
-#if !defined(PROCESS_ID_IS_CURLWP) || defined(MULTIPROCESSOR)
str r5, [r7, #(CI_CURLWP)] /* save new lwp */
-#endif
/*
* Normally, we'd get {r8-r13} but since this is a softint lwp
@@ -426,12 +433,10 @@ ENTRY_NP(softint_switch)
* never executed. But we do need the SP from the formerly pinned lwp.
*/
-#if defined(PROCESS_ID_IS_CURLWP)
+#if defined(TPIDRPRW_IS_CURLWP)
mcr p15, 0, r4, c13, c0, 4 /* restore pinned lwp */
#endif
-#if !defined(PROCESS_ID_IS_CURLWP) || defined(MULTIPROCESSOR)
str r4, [r7, #(CI_CURLWP)] /* restore pinned lwp */
-#endif
ldr sp, [r2, #(PCB_SP)] /* now running on the old stack. */
/* At this point we can allow IRQ's again. */
Index: src/sys/arch/arm/arm32/locore.S
diff -u src/sys/arch/arm/arm32/locore.S:1.26 src/sys/arch/arm/arm32/locore.S:1.27
--- src/sys/arch/arm/arm32/locore.S:1.26 Thu Aug 16 18:22:40 2012
+++ src/sys/arch/arm/arm32/locore.S Wed Aug 29 07:14:04 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.26 2012/08/16 18:22:40 matt Exp $ */
+/* $NetBSD: locore.S,v 1.27 2012/08/29 07:14:04 matt Exp $ */
/*
* Copyright (C) 1994-1997 Mark Brinicombe
@@ -42,7 +42,7 @@
/* What size should this really be ? It is only used by init_arm() */
#define INIT_ARM_STACK_SIZE 2048
- RCSID("$NetBSD: locore.S,v 1.26 2012/08/16 18:22:40 matt Exp $")
+ RCSID("$NetBSD: locore.S,v 1.27 2012/08/29 07:14:04 matt Exp $")
/*
* This is for kvm_mkdb, and should be the address of the beginning
@@ -56,12 +56,11 @@ ENTRY_NP(kernel_text)
ASENTRY_NP(start)
adr r1, .Lstart
- ldmia r1, {r1, r2, sp} /* Set initial stack and */
- sub r2, r2, r1 /* get zero init data */
+ ldmia r1, {r1, r2, r8, sp} /* Set initial stack and */
+ sub r2, r2, r1 /* get zero init data and cpu_info_store */
-#ifdef PROCESS_ID_IS_CURCPU
- ldr r3, .Lcpu_info_store
- mcr p15, 0, r3, c13, c0, 4
+#if defined(TPIDRPRW_IS_CURCPU) || defined(TPIDRPRW_IS_CURLWP)
+ mcr p15, 0, r8, c13, c0, 4
#endif
mov r3, #0
@@ -70,6 +69,9 @@ ASENTRY_NP(start)
subs r2, r2, #4
bgt .L1
+ mrc p15, 0, r3, c0, c0, 0 /* get our cpuid and save it early */
+ str r3, [r8, #CI_ARM_CPUID]
+
mov fp, #0x00000000 /* trace back starts here */
bl _C_LABEL(initarm) /* Off we go */
@@ -87,14 +89,16 @@ ASENTRY_NP(start)
b _C_LABEL(panic)
/* NOTREACHED */
-#ifdef PROCESS_ID_IS_CURCPU
-.Lcpu_info_store:
- .word _C_LABEL(cpu_info_store)
-#endif
-
.Lstart:
.word _edata
.word _end
+#if defined(TPIDRPRW_IS_CURCPU)
+ .word _C_LABEL(cpu_info_store)
+#elif defined(TPIDRPRW_IS_CURLWP)
+ .word _C_LABEL(lwp0)
+#else
+ .word 0
+#endif
.word svcstk + INIT_ARM_STACK_SIZE
.Lmainreturned:
@@ -115,11 +119,15 @@ svcstk:
.word _C_LABEL(cpufuncs)
ENTRY_NP(cpu_reset)
+#ifdef _ARM_ARCH_6
+ cpsid if, #PSR_SVC32_MODE
+#else
mrs r2, cpsr
bic r2, r2, #(PSR_MODE)
orr r2, r2, #(PSR_SVC32_MODE)
orr r2, r2, #(IF32_bits)
msr cpsr_c, r2
+#endif
ldr r0, .Lcpufuncs
mov lr, pc
@@ -142,9 +150,12 @@ ENTRY_NP(cpu_reset)
* MMU & IDC off, 32 bit program & data space
* Hurl ourselves into the ROM
*/
- mov r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
- mcr 15, 0, r0, c1, c0, 0
- mcreq 15, 0, r2, c8, c7, 0 /* nail I+D TLB on ARMv4 and greater */
+ mrc p15, 0, r0, c1, c0, 0
+ bic r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE)
+ bic r0, #(CPU_CONTROL_IC_ENABLE)
+ orr r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
+ mcr p15, 0, r0, c1, c0, 0
+ mcreq p15, 0, r2, c8, c7, 0 /* nail I+D TLB on ARMv4 and greater */
mov pc, r4
/*
Index: src/sys/arch/arm/conf/files.arm
diff -u src/sys/arch/arm/conf/files.arm:1.108 src/sys/arch/arm/conf/files.arm:1.109
--- src/sys/arch/arm/conf/files.arm:1.108 Sun Aug 12 05:05:47 2012
+++ src/sys/arch/arm/conf/files.arm Wed Aug 29 07:14:04 2012
@@ -1,4 +1,4 @@
-# $NetBSD: files.arm,v 1.108 2012/08/12 05:05:47 matt Exp $
+# $NetBSD: files.arm,v 1.109 2012/08/29 07:14:04 matt Exp $
# temporary define to allow easy moving to ../arch/arm/arm32
defflag ARM32
@@ -30,8 +30,8 @@ defflag opt_cpuoptions.h XSCALE_NO_COAL
defflag opt_cpuoptions.h XSCALE_CACHE_READ_WRITE_ALLOCATE
defflag opt_cpuoptions.h ARM32_DISABLE_ALIGNMENT_FAULTS
defflag opt_cpuoptions.h ARM9_CACHE_WRITE_THROUGH
-defflag opt_cpuoptions.h PROCESS_ID_IS_CURLWP
-defflag opt_cpuoptions.h PROCESS_ID_IS_CURCPU
+defflag opt_cpuoptions.h TPIDRPRW_IS_CURLWP
+defflag opt_cpuoptions.h TPIDRPRW_IS_CURCPU
defflag opt_cpuoptions.h ARM11_PMC CORTEX_PMC
defflag opt_cpuoptions.h ARM11_CACHE_WRITE_THROUGH
defflag opt_cpuoptions.h ARM11MPCORE_COMPAT_MMU
Index: src/sys/arch/arm/include/cpu.h
diff -u src/sys/arch/arm/include/cpu.h:1.68 src/sys/arch/arm/include/cpu.h:1.69
--- src/sys/arch/arm/include/cpu.h:1.68 Thu Aug 16 17:35:01 2012
+++ src/sys/arch/arm/include/cpu.h Wed Aug 29 07:14:05 2012
@@ -110,10 +110,10 @@ extern int cpu_do_powersave;
/* Not yet used in 26-bit code */
#endif
-#if defined (PROCESS_ID_IS_CURCPU)
+#if defined (TPIDRPRW_IS_CURCPU)
#define GET_CURCPU(rX) mrc p15, 0, rX, c13, c0, 4
#define GET_CURLWP(rX) GET_CURCPU(rX); ldr rX, [rX, #CI_CURLWP]
-#elif defined (PROCESS_ID_IS_CURLWP)
+#elif defined (TPIDRPRW_IS_CURLWP)
#define GET_CURLWP(rX) mrc p15, 0, rX, c13, c0, 4
#define GET_CURCPU(rX) GET_CURLWP(rX); ldr rX, [rX, #L_CPU]
#elif !defined(MULTIPROCESSOR)
@@ -243,9 +243,7 @@ struct cpu_info {
lwp_t *ci_softlwps[SOFTINT_COUNT];
volatile uint32_t ci_softints;
#endif
-#if !defined(PROCESS_ID_IS_CURLWP)
lwp_t *ci_curlwp; /* current lwp */
-#endif
#ifdef _ARM_ARCH_6
uint32_t ci_ccnt_freq; /* cycle count frequency */
#endif
@@ -260,7 +258,7 @@ struct cpu_info {
#ifndef MULTIPROCESSOR
extern struct cpu_info cpu_info_store;
-#if defined(PROCESS_ID_IS_CURLWP)
+#if defined(TPIDRPRW_IS_CURLWP)
static inline struct lwp *
_curlwp(void)
{
@@ -281,7 +279,7 @@ curcpu(void)
{
return curlwp->l_cpu;
}
-#elif defined(PROCESS_ID_IS_CURCPU)
+#elif defined(TPIDRPRW_IS_CURCPU)
static inline struct cpu_info *
curcpu(void)
{
@@ -291,7 +289,7 @@ curcpu(void)
}
#else
#define curcpu() (&cpu_info_store)
-#endif /* !PROCESS_ID_IS_CURCPU && !PROCESS_ID_IS_CURLWP */
+#endif /* !TPIDRPRW_IS_CURCPU && !TPIDRPRW_IS_CURLWP */
#ifndef curlwp
#define curlwp (curcpu()->ci_curlwp)
#endif
Index: src/sys/arch/evbarm/conf/std.beagle
diff -u src/sys/arch/evbarm/conf/std.beagle:1.3 src/sys/arch/evbarm/conf/std.beagle:1.4
--- src/sys/arch/evbarm/conf/std.beagle:1.3 Sat Jun 19 19:44:58 2010
+++ src/sys/arch/evbarm/conf/std.beagle Wed Aug 29 07:14:05 2012
@@ -1,4 +1,4 @@
-# $NetBSD: std.beagle,v 1.3 2010/06/19 19:44:58 matt Exp $
+# $NetBSD: std.beagle,v 1.4 2012/08/29 07:14:05 matt Exp $
#
# standard NetBSD/evbarm for BEAGLEBAORD options
@@ -16,7 +16,7 @@ options ARM32
options CORTEX_PMC
options CORTEX_PMC_CCNT_HZ=500000000
options __HAVE_FAST_SOFTINTS # should be in types.h
-#options PROCESS_ID_IS_CURLWP
+options TPIDRPRW_IS_CURCPU
options KERNEL_BASE_EXT=0x80000000
makeoptions LOADADDRESS="0x80300000"
Index: src/sys/arch/evbarm/conf/std.igepv2
diff -u src/sys/arch/evbarm/conf/std.igepv2:1.2 src/sys/arch/evbarm/conf/std.igepv2:1.3
--- src/sys/arch/evbarm/conf/std.igepv2:1.2 Sat Jun 19 19:44:58 2010
+++ src/sys/arch/evbarm/conf/std.igepv2 Wed Aug 29 07:14:05 2012
@@ -1,4 +1,4 @@
-# $NetBSD: std.igepv2,v 1.2 2010/06/19 19:44:58 matt Exp $
+# $NetBSD: std.igepv2,v 1.3 2012/08/29 07:14:05 matt Exp $
#
# standard NetBSD/evbarm for IGEPV2 options
@@ -16,7 +16,7 @@ options ARM32
options CORTEX_PMC
options CORTEX_PMC_CCNT_HZ=720000000
options __HAVE_FAST_SOFTINTS # should be in types.h
-#options PROCESS_ID_IS_CURLWP
+#options TPIDRPRW_IS_CURLWP
options KERNEL_BASE_EXT=0x80000000
makeoptions LOADADDRESS="0x80300000"
Index: src/sys/arch/evbarm/conf/std.overo
diff -u src/sys/arch/evbarm/conf/std.overo:1.2 src/sys/arch/evbarm/conf/std.overo:1.3
--- src/sys/arch/evbarm/conf/std.overo:1.2 Tue Jul 20 12:14:16 2010
+++ src/sys/arch/evbarm/conf/std.overo Wed Aug 29 07:14:06 2012
@@ -1,4 +1,4 @@
-# $NetBSD: std.overo,v 1.2 2010/07/20 12:14:16 kiyohara Exp $
+# $NetBSD: std.overo,v 1.3 2012/08/29 07:14:06 matt Exp $
#
# standard NetBSD/evbarm for OVERO options
@@ -15,7 +15,7 @@ options EXEC_SCRIPT
options ARM32
options CORTEX_PMC
options __HAVE_FAST_SOFTINTS # should be in types.h
-#options PROCESS_ID_IS_CURLWP
+#options TPIDRPRW_IS_CURLWP
options KERNEL_BASE_EXT=0x80000000
makeoptions LOADADDRESS="0x80200000"
Index: src/sys/arch/evbarm/conf/std.tisdp24xx
diff -u src/sys/arch/evbarm/conf/std.tisdp24xx:1.6 src/sys/arch/evbarm/conf/std.tisdp24xx:1.7
--- src/sys/arch/evbarm/conf/std.tisdp24xx:1.6 Fri Nov 21 00:18:57 2008
+++ src/sys/arch/evbarm/conf/std.tisdp24xx Wed Aug 29 07:14:06 2012
@@ -1,4 +1,4 @@
-# $NetBSD: std.tisdp24xx,v 1.6 2008/11/21 00:18:57 matt Exp $
+# $NetBSD: std.tisdp24xx,v 1.7 2012/08/29 07:14:06 matt Exp $
#
# standard NetBSD/evbarm for SDP2430 options
@@ -16,8 +16,8 @@ options ARM32
options ARM11_PMC
options ARM11_PMC_CCNT_HZ=266000000
options __HAVE_FAST_SOFTINTS # should be in types.h
-#options PROCESS_ID_IS_CURLWP
-#options PROCESS_ID_IS_CURCPU
+#options TPIDRPRW_IS_CURLWP
+#options TPIDRPRW_IS_CURCPU
options KERNEL_BASE_EXT=0x80000000
makeoptions LOADADDRESS="0x80300000"
