Module Name: src
Committed By: matt
Date: Wed Aug 29 07:06:28 UTC 2012
Modified Files:
src/sys/arch/arm/arm32: irq_dispatch.S
src/sys/arch/arm/iomd: iomd_irq.S
src/sys/arch/arm/ofw: ofw_irq.S
src/sys/arch/arm/sa11x0: sa11x0_irq.S
Log Message:
Avoid using r7 (which is being reserved for a different purpose).
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/arm32/irq_dispatch.S
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/iomd/iomd_irq.S
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/ofw/ofw_irq.S
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/sa11x0/sa11x0_irq.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/irq_dispatch.S
diff -u src/sys/arch/arm/arm32/irq_dispatch.S:1.11 src/sys/arch/arm/arm32/irq_dispatch.S:1.12
--- src/sys/arch/arm/arm32/irq_dispatch.S:1.11 Sat May 28 20:53:57 2011
+++ src/sys/arch/arm/arm32/irq_dispatch.S Wed Aug 29 07:06:27 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: irq_dispatch.S,v 1.11 2011/05/28 20:53:57 jakllsch Exp $ */
+/* $NetBSD: irq_dispatch.S,v 1.12 2012/08/29 07:06:27 matt Exp $ */
/*
* Copyright (c) 2002 Fujitsu Component Limited
@@ -90,12 +90,8 @@
* which can be used by different platforms.
*/
.text
- .align 0
-
-LOCK_CAS_CHECK_LOCALS
-
-AST_ALIGNMENT_FAULT_LOCALS
+ .p2align 5
ASENTRY_NP(irq_entry)
sub lr, lr, #0x00000004 /* Adjust the lr */
@@ -111,11 +107,11 @@ ASENTRY_NP(irq_entry)
* r4 address of current cpu_info
* r6 old value of `ci_intr_depth'
*/
- mov r0, sp /* arg for dispatcher */
ldr r6, [r4, #CI_INTR_DEPTH]
add r1, r6, #1
str r1, [r4, #CI_INTR_DEPTH]
+ mov r0, sp /* arg for dispatcher */
bl ARM_IRQ_HANDLER
/*
@@ -129,3 +125,9 @@ ASENTRY_NP(irq_entry)
DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
PULLFRAMEFROMSVCANDEXIT
movs pc, lr /* Exit */
+
+ .align 0
+
+LOCK_CAS_CHECK_LOCALS
+
+AST_ALIGNMENT_FAULT_LOCALS
Index: src/sys/arch/arm/iomd/iomd_irq.S
diff -u src/sys/arch/arm/iomd/iomd_irq.S:1.13 src/sys/arch/arm/iomd/iomd_irq.S:1.14
--- src/sys/arch/arm/iomd/iomd_irq.S:1.13 Mon Dec 20 00:25:28 2010
+++ src/sys/arch/arm/iomd/iomd_irq.S Wed Aug 29 07:06:27 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: iomd_irq.S,v 1.13 2010/12/20 00:25:28 matt Exp $ */
+/* $NetBSD: iomd_irq.S,v 1.14 2012/08/29 07:06:27 matt Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -121,6 +121,8 @@ ASENTRY_NP(irq_entry)
PUSHFRAMEINSVC /* Push an interrupt frame */
ENABLE_ALIGNMENT_FAULTS
+ str r7, [sp, #TF_FILL] /* save r7 */
+
/* Load r8 with the IOMD interrupt requests */
ldr r10, Liomd_base
@@ -339,6 +341,7 @@ exitirq:
sub r0, r0, #1
str r0, [r4, #CI_INTR_DEPTH]
+ ldr r7, [sp, #TF_FILL] /* restore r7 */
LOCK_CAS_CHECK
DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
Index: src/sys/arch/arm/ofw/ofw_irq.S
diff -u src/sys/arch/arm/ofw/ofw_irq.S:1.12 src/sys/arch/arm/ofw/ofw_irq.S:1.13
--- src/sys/arch/arm/ofw/ofw_irq.S:1.12 Mon Dec 20 00:25:28 2010
+++ src/sys/arch/arm/ofw/ofw_irq.S Wed Aug 29 07:06:27 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: ofw_irq.S,v 1.12 2010/12/20 00:25:28 matt Exp $ */
+/* $NetBSD: ofw_irq.S,v 1.13 2012/08/29 07:06:27 matt Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -94,9 +94,10 @@ AST_ALIGNMENT_FAULT_LOCALS
/*
* Regsister usage
*
- * r4 - Address of cpu_info
+ * r4 - Address of cpu_info (on entry)
+ * r5 - Pointer to handler pointer list
* r6 - Address of current handler
- * r7 - Pointer to handler pointer list
+ * r7 - pspr mode (must be preserved)
* r8 - Current IRQ requests.
* r9 - Used to count through possible IRQ bits.
* r10 - Base address of IOMD
@@ -223,17 +224,17 @@ ofwtakeint:
*/
mov r9, #(NIPL - 1)
- ldr r7, Lspl_masks
+ ldr r5, Lspl_masks
Lfind_highest_ipl:
- ldr r2, [r7, r9, lsl #2]
+ ldr r2, [r5, r9, lsl #2]
tst r8, r2
subeq r9, r9, #1
beq Lfind_highest_ipl
/* r9 = SPL level of highest priority interrupt */
add r9, r9, #1
- ldr r2, [r7, r9, lsl #2]
+ ldr r2, [r5, r9, lsl #2]
mvn r2, r2
orr r0, r0, r2
@@ -251,7 +252,7 @@ Lfind_highest_ipl:
bic r0, r0, #I32_bit
msr cpsr_all, r0
- ldr r7, Lirqhandlers
+ ldr r5, Lirqhandlers
mov r9, #0x00000001
irqloop:
@@ -259,7 +260,7 @@ irqloop:
tst r8, r9 /* Is a bit set ? */
beq nextirq /* No ? try next bit */
- ldr r6, [r7] /* Get address of first handler structure */
+ ldr r6, [r5] /* Get address of first handler structure */
teq r6, #0x00000000 /* Do we have a handler */
moveq r0, r8 /* IRQ requests as arg 0 */
@@ -300,7 +301,7 @@ irqdone:
stmia r3, {r1-r2} /* store ev_count */
nextirq:
- add r7, r7, #0x00000004 /* update pointer to handlers */
+ add r5, r5, #0x00000004 /* update pointer to handlers */
mov r9, r9, lsl #1 /* move on to next bit */
teq r9, #(1 << 24) /* done the last bit ? */
bne irqloop /* no - loop back. */
Index: src/sys/arch/arm/sa11x0/sa11x0_irq.S
diff -u src/sys/arch/arm/sa11x0/sa11x0_irq.S:1.15 src/sys/arch/arm/sa11x0/sa11x0_irq.S:1.16
--- src/sys/arch/arm/sa11x0/sa11x0_irq.S:1.15 Mon Dec 20 00:25:29 2010
+++ src/sys/arch/arm/sa11x0/sa11x0_irq.S Wed Aug 29 07:06:27 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_irq.S,v 1.15 2010/12/20 00:25:29 matt Exp $ */
+/* $NetBSD: sa11x0_irq.S,v 1.16 2012/08/29 07:06:27 matt Exp $ */
/*
* Copyright (c) 1998 Mark Brinicombe.
@@ -72,8 +72,10 @@ AST_ALIGNMENT_FAULT_LOCALS
/*
* Register usage
*
+ * r4 - Pointer to cpu_info
+ * r5 - Pointer to handler pointer list
* r6 - Address of current handler
- * r7 - Pointer to handler pointer list
+ * r7 - pspr mode
* r8 - Current IRQ requests.
* r9 - Used to count through possible IRQ bits.
* r10 - Base address of SAIP
@@ -121,17 +123,17 @@ ASENTRY_NP(irq_entry)
*/
mov r9, #(NIPL - 1)
- ldr r7, Lspl_masks
+ ldr r5, Lspl_masks
Lfind_highest_ipl:
- ldr r2, [r7, r9, lsl #2]
+ ldr r2, [r5, r9, lsl #2]
tst r8, r2
subeq r9, r9, #1
beq Lfind_highest_ipl
/* r9 = SPL level of highest priority interrupt */
add r9, r9, #1
- ldr r2, [r7, r9, lsl #2]
+ ldr r2, [r5, r9, lsl #2]
ldr r1, [r4, #CI_CPL]
str r9, [r4, #CI_CPL]
@@ -152,7 +154,7 @@ Lfind_highest_ipl:
bic r0, r0, #I32_bit
msr cpsr_all, r0
- ldr r7, Lirqhandlers
+ ldr r5, Lirqhandlers
mov r9, #0x00000001
irqloop:
@@ -160,7 +162,7 @@ irqloop:
tst r8, r9 /* Is a bit set ? */
beq nextirq /* No ? try next bit */
- ldr r6, [r7] /* Get address of first handler structure */
+ ldr r6, [r5] /* Get address of first handler structure */
teq r6, #0x00000000 /* Do we have a handler */
moveq r0, r8 /* IRQ requests as arg 0 */
@@ -216,7 +218,7 @@ irqchainloop:
irqdone:
nextirq:
- add r7, r7, #0x00000004 /* update pointer to handlers */
+ add r5, r5, #0x00000004 /* update pointer to handlers */
mov r9, r9, lsl #1 /* move on to next bit */
teq r9, #(1 << 31) /* done the last bit ? */
bne irqloop /* no - loop back. */
