Module Name: src
Committed By: kiyohara
Date: Sat Oct 20 14:42:15 UTC 2012
Modified Files:
src/sys/arch/powerpc/conf: files.powerpc
src/sys/arch/powerpc/include: cpu.h
src/sys/arch/powerpc/oea: cpu_subr.c ofwoea_machdep.c pmap.c
src/sys/arch/powerpc/powerpc: vm_machdep.c
Log Message:
Support Cache Protocol 'MEI' with MULTIPROCESSOR.
To generate a diff of this commit:
cvs rdiff -u -r1.84 -r1.85 src/sys/arch/powerpc/conf/files.powerpc
cvs rdiff -u -r1.93 -r1.94 src/sys/arch/powerpc/include/cpu.h
cvs rdiff -u -r1.75 -r1.76 src/sys/arch/powerpc/oea/cpu_subr.c
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/powerpc/oea/ofwoea_machdep.c
cvs rdiff -u -r1.86 -r1.87 src/sys/arch/powerpc/oea/pmap.c
cvs rdiff -u -r1.97 -r1.98 src/sys/arch/powerpc/powerpc/vm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/conf/files.powerpc
diff -u src/sys/arch/powerpc/conf/files.powerpc:1.84 src/sys/arch/powerpc/conf/files.powerpc:1.85
--- src/sys/arch/powerpc/conf/files.powerpc:1.84 Tue Oct 2 23:51:39 2012
+++ src/sys/arch/powerpc/conf/files.powerpc Sat Oct 20 14:42:15 2012
@@ -1,9 +1,10 @@
-# $NetBSD: files.powerpc,v 1.84 2012/10/02 23:51:39 christos Exp $
+# $NetBSD: files.powerpc,v 1.85 2012/10/20 14:42:15 kiyohara Exp $
defflag opt_altivec.h ALTIVEC K_ALTIVEC PPC_HAVE_SPE
defflag opt_openpic.h OPENPIC OPENPIC_SERIAL_MODE OPENPIC_DISTRIBUTE
defparam opt_ppcparam.h L2CR_CONFIG L3CR_CONFIG INTSTK CLOCKBASE VERBOSE_INITPPC
defflag opt_ppcarch.h PPC_OEA PPC_OEA601 PPC_OEA64 PPC_OEA64_BRIDGE PPC_MPC8XX PPC_IBM4XX PPC_IBM403 PPC_BOOKE
+defflag opt_ppccache.h CACHE_PROTO_MEI
defflag opt_pmap.h PMAPDEBUG PMAPCHECK PMAPCOUNTERS PMAP_MINIMALTLB
defparam opt_pmap.h PTEGCOUNT PMAP_MEMLIMIT
Index: src/sys/arch/powerpc/include/cpu.h
diff -u src/sys/arch/powerpc/include/cpu.h:1.93 src/sys/arch/powerpc/include/cpu.h:1.94
--- src/sys/arch/powerpc/include/cpu.h:1.93 Sat Jul 28 23:11:00 2012
+++ src/sys/arch/powerpc/include/cpu.h Sat Oct 20 14:42:15 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.93 2012/07/28 23:11:00 matt Exp $ */
+/* $NetBSD: cpu.h,v 1.94 2012/10/20 14:42:15 kiyohara Exp $ */
/*
* Copyright (C) 1999 Wolfgang Solfrank.
@@ -165,7 +165,8 @@ struct cpu_hatch_data {
uintptr_t hatch_asr;
uintptr_t hatch_sdr1;
uint32_t hatch_sr[16];
- uintptr_t hatch_batu[8], hatch_batl[8];
+ uintptr_t hatch_ibatu[8], hatch_ibatl[8];
+ uintptr_t hatch_dbatu[8], hatch_dbatl[8];
#endif
#if defined(PPC_BOOKE)
vaddr_t hatch_sp;
Index: src/sys/arch/powerpc/oea/cpu_subr.c
diff -u src/sys/arch/powerpc/oea/cpu_subr.c:1.75 src/sys/arch/powerpc/oea/cpu_subr.c:1.76
--- src/sys/arch/powerpc/oea/cpu_subr.c:1.75 Sat Oct 20 13:18:45 2012
+++ src/sys/arch/powerpc/oea/cpu_subr.c Sat Oct 20 14:42:15 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_subr.c,v 1.75 2012/10/20 13:18:45 kiyohara Exp $ */
+/* $NetBSD: cpu_subr.c,v 1.76 2012/10/20 14:42:15 kiyohara Exp $ */
/*-
* Copyright (c) 2001 Matt Thomas.
@@ -34,9 +34,10 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.75 2012/10/20 13:18:45 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.76 2012/10/20 14:42:15 kiyohara Exp $");
#include "opt_ppcparam.h"
+#include "opt_ppccache.h"
#include "opt_multiprocessor.h"
#include "opt_altivec.h"
#include "sysmon_envsys.h"
@@ -581,6 +582,13 @@ cpu_setup(device_t self, struct cpu_info
break;
}
+#ifdef MULTIPROCESSOR
+ switch (vers) {
+ case MPC603e:
+ hid0 |= HID0_ABE;
+ }
+#endif
+
if (hid0 != hid0_save) {
mtspr(SPR_HID0, hid0);
__asm volatile("sync;isync");
@@ -1189,7 +1197,7 @@ cpu_tau_refresh(struct sysmon_envsys *sm
#endif /* NSYSMON_ENVSYS > 0 */
#ifdef MULTIPROCESSOR
-extern volatile u_int cpu_spinstart_ack;
+volatile u_int cpu_spinstart_ack, cpu_spinstart_cpunum;
int
cpu_spinup(device_t self, struct cpu_info *ci)
@@ -1243,14 +1251,22 @@ cpu_spinup(device_t self, struct cpu_inf
h->hatch_asr = 0;
/* copy the bat regs */
- __asm volatile ("mfibatu %0,0" : "=r"(h->hatch_batu[0]));
- __asm volatile ("mfibatl %0,0" : "=r"(h->hatch_batl[0]));
- __asm volatile ("mfibatu %0,1" : "=r"(h->hatch_batu[1]));
- __asm volatile ("mfibatl %0,1" : "=r"(h->hatch_batl[1]));
- __asm volatile ("mfibatu %0,2" : "=r"(h->hatch_batu[2]));
- __asm volatile ("mfibatl %0,2" : "=r"(h->hatch_batl[2]));
- __asm volatile ("mfibatu %0,3" : "=r"(h->hatch_batu[3]));
- __asm volatile ("mfibatl %0,3" : "=r"(h->hatch_batl[3]));
+ __asm volatile ("mfibatu %0,0" : "=r"(h->hatch_ibatu[0]));
+ __asm volatile ("mfibatl %0,0" : "=r"(h->hatch_ibatl[0]));
+ __asm volatile ("mfibatu %0,1" : "=r"(h->hatch_ibatu[1]));
+ __asm volatile ("mfibatl %0,1" : "=r"(h->hatch_ibatl[1]));
+ __asm volatile ("mfibatu %0,2" : "=r"(h->hatch_ibatu[2]));
+ __asm volatile ("mfibatl %0,2" : "=r"(h->hatch_ibatl[2]));
+ __asm volatile ("mfibatu %0,3" : "=r"(h->hatch_ibatu[3]));
+ __asm volatile ("mfibatl %0,3" : "=r"(h->hatch_ibatl[3]));
+ __asm volatile ("mfdbatu %0,0" : "=r"(h->hatch_dbatu[0]));
+ __asm volatile ("mfdbatl %0,0" : "=r"(h->hatch_dbatl[0]));
+ __asm volatile ("mfdbatu %0,1" : "=r"(h->hatch_dbatu[1]));
+ __asm volatile ("mfdbatl %0,1" : "=r"(h->hatch_dbatl[1]));
+ __asm volatile ("mfdbatu %0,2" : "=r"(h->hatch_dbatu[2]));
+ __asm volatile ("mfdbatl %0,2" : "=r"(h->hatch_dbatl[2]));
+ __asm volatile ("mfdbatu %0,3" : "=r"(h->hatch_dbatu[3]));
+ __asm volatile ("mfdbatl %0,3" : "=r"(h->hatch_dbatl[3]));
__asm volatile ("sync; isync");
if (md_setup_trampoline(h, ci) == -1)
@@ -1262,7 +1278,19 @@ cpu_spinup(device_t self, struct cpu_inf
delay(200000);
+#ifdef CACHE_PROTO_MEI
+ __asm volatile ("dcbi 0,%0"::"r"(&h->hatch_running):"memory");
+ __asm volatile ("sync; isync");
+ __asm volatile ("dcbst 0,%0"::"r"(&h->hatch_running):"memory");
+ __asm volatile ("sync; isync");
+#endif
if (h->hatch_running < 1) {
+#ifdef CACHE_PROTO_MEI
+ __asm volatile ("dcbi 0,%0"::"r"(&cpu_spinstart_ack):"memory");
+ __asm volatile ("sync; isync");
+ __asm volatile ("dcbst 0,%0"::"r"(&cpu_spinstart_ack):"memory");
+ __asm volatile ("sync; isync");
+#endif
aprint_error("%d:CPU %d didn't start %d\n", cpu_spinstart_ack,
ci->ci_cpuid, cpu_spinstart_ack);
Debugger();
@@ -1305,14 +1333,22 @@ cpu_hatch(void)
cpu_spinstart_ack = 0;
/* Initialize MMU. */
- __asm ("mtibatu 0,%0" :: "r"(h->hatch_batu[0]));
- __asm ("mtibatl 0,%0" :: "r"(h->hatch_batl[0]));
- __asm ("mtibatu 1,%0" :: "r"(h->hatch_batu[1]));
- __asm ("mtibatl 1,%0" :: "r"(h->hatch_batl[1]));
- __asm ("mtibatu 2,%0" :: "r"(h->hatch_batu[2]));
- __asm ("mtibatl 2,%0" :: "r"(h->hatch_batl[2]));
- __asm ("mtibatu 3,%0" :: "r"(h->hatch_batu[3]));
- __asm ("mtibatl 3,%0" :: "r"(h->hatch_batl[3]));
+ __asm ("mtibatu 0,%0" :: "r"(h->hatch_ibatu[0]));
+ __asm ("mtibatl 0,%0" :: "r"(h->hatch_ibatl[0]));
+ __asm ("mtibatu 1,%0" :: "r"(h->hatch_ibatu[1]));
+ __asm ("mtibatl 1,%0" :: "r"(h->hatch_ibatl[1]));
+ __asm ("mtibatu 2,%0" :: "r"(h->hatch_ibatu[2]));
+ __asm ("mtibatl 2,%0" :: "r"(h->hatch_ibatl[2]));
+ __asm ("mtibatu 3,%0" :: "r"(h->hatch_ibatu[3]));
+ __asm ("mtibatl 3,%0" :: "r"(h->hatch_ibatl[3]));
+ __asm ("mtdbatu 0,%0" :: "r"(h->hatch_dbatu[0]));
+ __asm ("mtdbatl 0,%0" :: "r"(h->hatch_dbatl[0]));
+ __asm ("mtdbatu 1,%0" :: "r"(h->hatch_dbatu[1]));
+ __asm ("mtdbatl 1,%0" :: "r"(h->hatch_dbatl[1]));
+ __asm ("mtdbatu 2,%0" :: "r"(h->hatch_dbatu[2]));
+ __asm ("mtdbatl 2,%0" :: "r"(h->hatch_dbatl[2]));
+ __asm ("mtdbatu 3,%0" :: "r"(h->hatch_dbatu[3]));
+ __asm ("mtdbatl 3,%0" :: "r"(h->hatch_dbatl[3]));
mtspr(SPR_HID0, h->hatch_hid0);
Index: src/sys/arch/powerpc/oea/ofwoea_machdep.c
diff -u src/sys/arch/powerpc/oea/ofwoea_machdep.c:1.30 src/sys/arch/powerpc/oea/ofwoea_machdep.c:1.31
--- src/sys/arch/powerpc/oea/ofwoea_machdep.c:1.30 Tue Jul 17 03:13:31 2012
+++ src/sys/arch/powerpc/oea/ofwoea_machdep.c Sat Oct 20 14:42:15 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: ofwoea_machdep.c,v 1.30 2012/07/17 03:13:31 jmmv Exp $ */
+/* $NetBSD: ofwoea_machdep.c,v 1.31 2012/10/20 14:42:15 kiyohara Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ofwoea_machdep.c,v 1.30 2012/07/17 03:13:31 jmmv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ofwoea_machdep.c,v 1.31 2012/10/20 14:42:15 kiyohara Exp $");
#include "opt_ppcarch.h"
#include "opt_compat_netbsd.h"
@@ -130,7 +130,7 @@ static void restore_ofmap(struct ofw_tra
static void set_timebase(void);
extern void cpu_spinstart(u_int);
-volatile u_int cpu_spinstart_ack, cpu_spinstart_cpunum;
+extern volatile u_int cpu_spinstart_ack;
void
ofwoea_initppc(u_int startkernel, u_int endkernel, char *args)
Index: src/sys/arch/powerpc/oea/pmap.c
diff -u src/sys/arch/powerpc/oea/pmap.c:1.86 src/sys/arch/powerpc/oea/pmap.c:1.87
--- src/sys/arch/powerpc/oea/pmap.c:1.86 Sat Jul 28 23:11:00 2012
+++ src/sys/arch/powerpc/oea/pmap.c Sat Oct 20 14:42:15 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.86 2012/07/28 23:11:00 matt Exp $ */
+/* $NetBSD: pmap.c,v 1.87 2012/10/20 14:42:15 kiyohara Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -63,7 +63,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.86 2012/07/28 23:11:00 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.87 2012/10/20 14:42:15 kiyohara Exp $");
#define PMAP_NOOPNAMES
@@ -490,7 +490,11 @@ extern struct evcnt pmap_evcnt_idlezeroe
/* XXXSL: this needs to be moved to assembler */
#define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va))
+#ifdef MD_TLBSYNC
+#define TLBSYNC() MD_TLBSYNC()
+#else
#define TLBSYNC() __asm volatile("tlbsync")
+#endif
#define SYNC() __asm volatile("sync")
#define EIEIO() __asm volatile("eieio")
#define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va))
@@ -1939,6 +1943,10 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_
break;
}
}
+#ifdef MULTIPROCESSOR
+ if (((mfpvr() >> 16) & 0xffff) == MPC603e)
+ pte_lo = PTE_M;
+#endif
} else {
pte_lo |= PTE_I;
}
@@ -2032,6 +2040,10 @@ pmap_kenter_pa(vaddr_t va, paddr_t pa, v
break;
}
}
+#ifdef MULTIPROCESSOR
+ if (((mfpvr() >> 16) & 0xffff) == MPC603e)
+ pte_lo = PTE_M;
+#endif
}
if (prot & VM_PROT_WRITE)
Index: src/sys/arch/powerpc/powerpc/vm_machdep.c
diff -u src/sys/arch/powerpc/powerpc/vm_machdep.c:1.97 src/sys/arch/powerpc/powerpc/vm_machdep.c:1.98
--- src/sys/arch/powerpc/powerpc/vm_machdep.c:1.97 Thu Jun 28 15:28:44 2012
+++ src/sys/arch/powerpc/powerpc/vm_machdep.c Sat Oct 20 14:42:15 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: vm_machdep.c,v 1.97 2012/06/28 15:28:44 matt Exp $ */
+/* $NetBSD: vm_machdep.c,v 1.98 2012/10/20 14:42:15 kiyohara Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -32,11 +32,12 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.97 2012/06/28 15:28:44 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.98 2012/10/20 14:42:15 kiyohara Exp $");
#include "opt_altivec.h"
#include "opt_multiprocessor.h"
#include "opt_ppcarch.h"
+#include "opt_ppccache.h"
#include <sys/param.h>
#include <sys/core.h>
@@ -151,6 +152,37 @@ cpu_lwp_fork(struct lwp *l1, struct lwp
#ifdef PPC_HAVE_FPU
pcb2->pcb_flags = PSL_FE_DFLT;
#endif
+#ifdef CACHE_PROTO_MEI
+ {
+ paddr_t pa;
+ int dcache_line_size, i;
+
+ /* Flush on cache values for other cpu. */
+
+ dcache_line_size = curcpu()->ci_ci.dcache_line_size;
+ pa = vtophys((vaddr_t)sf);
+ for (i = 0; i < SFRAMELEN + CALLFRAMELEN + FRAMELEN;
+ i += dcache_line_size) {
+ __asm volatile ("dcbf 0,%0"::"r"(pa):"memory");
+ pa += dcache_line_size;
+ }
+ __asm volatile ("dcbf 0,%0"::"r"(pa):"memory");
+ pa = vtophys((vaddr_t)pcb2->pcb_pm);
+ for (i = 0; i < sizeof(*pcb2->pcb_pm); i += dcache_line_size) {
+ __asm volatile ("dcbf 0,%0"::"r"(pa):"memory");
+ pa += dcache_line_size;
+ }
+ __asm volatile ("dcbf 0,%0"::"r"(pa):"memory");
+ pa = vtophys((vaddr_t)pcb2);
+ for (i = 0; i < sizeof(*pcb2); i += dcache_line_size) {
+ __asm volatile ("dcbf 0,%0"::"r"(pa):"memory");
+ pa += dcache_line_size;
+ }
+ __asm volatile ("dcbf 0,%0"::"r"(pa):"memory");
+
+ /* Need more flush? */
+ }
+#endif
}
void
