Module Name: src
Committed By: matt
Date: Tue Jun 18 15:01:49 UTC 2013
Modified Files:
src/sys/arch/arm/omap: omap3_uhhreg.h
Log Message:
Omap4 changes
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/omap/omap3_uhhreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/omap/omap3_uhhreg.h
diff -u src/sys/arch/arm/omap/omap3_uhhreg.h:1.1 src/sys/arch/arm/omap/omap3_uhhreg.h:1.2
--- src/sys/arch/arm/omap/omap3_uhhreg.h:1.1 Wed Dec 12 00:33:45 2012
+++ src/sys/arch/arm/omap/omap3_uhhreg.h Tue Jun 18 15:01:49 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: omap3_uhhreg.h,v 1.1 2012/12/12 00:33:45 matt Exp $ */
+/* $NetBSD: omap3_uhhreg.h,v 1.2 2013/06/18 15:01:49 matt Exp $ */
/*-
* Copyright (c) 2010 Jared D. McNeill <[email protected]>
@@ -53,18 +53,20 @@
UHH_SYSSTATUS_RESETDONE)
#define UHH_HOSTCONFIG 0x40
-#define UHH_HOSTCONFIG_APP_START_CLK 0x80000000
-#define UHH_HOSTCONFIG_P3_ULPI_BYPASS 0x00001000
-#define UHH_HOSTCONFIG_P2_ULPI_BYPASS 0x00000800
-#define UHH_HOSTCONFIG_P3_CONNECT_STATUS 0x00000400
-#define UHH_HOSTCONFIG_P2_CONNECT_STATUS 0x00000200
-#define UHH_HOSTCONFIG_P1_CONNECT_STATUS 0x00000100
-#define UHH_HOSTCONFIG_ENA_INCR_ALIGN 0x00000020
-#define UHH_HOSTCONFIG_ENA_INCR16 0x00000010
-#define UHH_HOSTCONFIG_ENA_INCR8 0x00000008
-#define UHH_HOSTCONFIG_ENA_INCR4 0x00000004
-#define UHH_HOSTCONFIG_AUTOPPD_ON_OVERCUR_EN 0x00000002
-#define UHH_HOSTCONFIG_P1_ULPI_BYPASS 0x00000001
+#define UHH_HOSTCONFIG_APP_START_CLK __BIT(31)
+#define UHH_HOSTCONFIG_P2_MODE __BITS(19,18)
+#define UHH_HOSTCONFIG_P1_MODE __BITS(17,16)
+#define UHH_HOSTCONFIG_P3_ULPI_BYPASS __BIT(12)
+#define UHH_HOSTCONFIG_P2_ULPI_BYPASS __BIT(11)
+#define UHH_HOSTCONFIG_P3_CONNECT_STATUS __BIT(10)
+#define UHH_HOSTCONFIG_P2_CONNECT_STATUS __BIT(9)
+#define UHH_HOSTCONFIG_P1_CONNECT_STATUS __BIT(8)
+#define UHH_HOSTCONFIG_ENA_INCR_ALIGN __BIT(5)
+#define UHH_HOSTCONFIG_ENA_INCR16 __BIT(4)
+#define UHH_HOSTCONFIG_ENA_INCR8 __BIT(3)
+#define UHH_HOSTCONFIG_ENA_INCR4 __BIT(2)
+#define UHH_HOSTCONFIG_AUTOPPD_ON_OVERCUR_EN __BIT(1)
+#define UHH_HOSTCONFIG_P1_ULPI_BYPASS __BIT(0)
#define UHH_DEBUG_CSR 0x44
#define UHH_DEBUG_CSR_OHCI_CCS_3 0x00080000
