Module Name: src
Committed By: matt
Date: Thu Jun 20 07:16:23 UTC 2013
Modified Files:
src/common/lib/libc/arch/arm/gen: divide.S divsi3.S modsi3.S udivsi3.S
umodsi3.S
Log Message:
Add support for __ARM_ARCH_EXT_IDIV__ which is set for those cores
with hardware divide instructions. Note that gcc 4.5.x doesn't support
this so this is just latent. gcc 4.7.x does.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/common/lib/libc/arch/arm/gen/divide.S \
src/common/lib/libc/arch/arm/gen/modsi3.S \
src/common/lib/libc/arch/arm/gen/umodsi3.S
cvs rdiff -u -r1.5 -r1.6 src/common/lib/libc/arch/arm/gen/divsi3.S
cvs rdiff -u -r1.1 -r1.2 src/common/lib/libc/arch/arm/gen/udivsi3.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/common/lib/libc/arch/arm/gen/divide.S
diff -u src/common/lib/libc/arch/arm/gen/divide.S:1.2 src/common/lib/libc/arch/arm/gen/divide.S:1.3
--- src/common/lib/libc/arch/arm/gen/divide.S:1.2 Wed May 8 05:13:56 2013
+++ src/common/lib/libc/arch/arm/gen/divide.S Thu Jun 20 07:16:23 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: divide.S,v 1.2 2013/05/08 05:13:56 matt Exp $ */
+/* $NetBSD: divide.S,v 1.3 2013/06/20 07:16:23 matt Exp $ */
/*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
@@ -14,6 +14,8 @@
* SUCH DAMAGE.
*/
+#ifndef __ARM_ARCH_EXT_IDIV__
+
#include <machine/asm.h>
/*
@@ -374,3 +376,5 @@ __divide: /* r0 = r0 / r1; r1 = r0 %
addhs r3, r3, r2
mov r0, r3
RET
+
+#endif /* __ARM_ARCH_EXT_IDIV__ */
Index: src/common/lib/libc/arch/arm/gen/modsi3.S
diff -u src/common/lib/libc/arch/arm/gen/modsi3.S:1.2 src/common/lib/libc/arch/arm/gen/modsi3.S:1.3
--- src/common/lib/libc/arch/arm/gen/modsi3.S:1.2 Wed Nov 28 01:35:05 2012
+++ src/common/lib/libc/arch/arm/gen/modsi3.S Thu Jun 20 07:16:23 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: modsi3.S,v 1.2 2012/11/28 01:35:05 matt Exp $ */
+/* $NetBSD: modsi3.S,v 1.3 2013/06/20 07:16:23 matt Exp $ */
/*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
@@ -22,9 +22,14 @@
*/
ENTRY(__modsi3)
+#ifdef __ARM_ARCH_EXT_IDIV__
+ sdiv r3, r0, r1
+ mls r0, r3, r1, r0
+#else
str lr, [sp, #-8]! /* push lr */
bl PIC_SYM(__divsi3, PLT)
mov r0, r1
ldr lr, [sp], #8 /* pop lr */
+#endif
RET
END(__modsi3)
Index: src/common/lib/libc/arch/arm/gen/umodsi3.S
diff -u src/common/lib/libc/arch/arm/gen/umodsi3.S:1.2 src/common/lib/libc/arch/arm/gen/umodsi3.S:1.3
--- src/common/lib/libc/arch/arm/gen/umodsi3.S:1.2 Wed Nov 28 01:35:05 2012
+++ src/common/lib/libc/arch/arm/gen/umodsi3.S Thu Jun 20 07:16:23 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: umodsi3.S,v 1.2 2012/11/28 01:35:05 matt Exp $ */
+/* $NetBSD: umodsi3.S,v 1.3 2013/06/20 07:16:23 matt Exp $ */
/*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
@@ -22,8 +22,13 @@
*/
ENTRY(__umodsi3)
+#ifdef __ARM_ARCH_EXT_IDIV__
+ udiv r3, r0, r1
+ mls r0, r3, r1, r0
+#else
str lr, [sp, #-8]! /* push lr */
bl PIC_SYM(__udivsi3, PLT)
mov r0, r1
ldr lr, [sp], #8 /* pop lr */
+#endif
RET
Index: src/common/lib/libc/arch/arm/gen/divsi3.S
diff -u src/common/lib/libc/arch/arm/gen/divsi3.S:1.5 src/common/lib/libc/arch/arm/gen/divsi3.S:1.6
--- src/common/lib/libc/arch/arm/gen/divsi3.S:1.5 Wed May 8 05:13:56 2013
+++ src/common/lib/libc/arch/arm/gen/divsi3.S Thu Jun 20 07:16:23 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: divsi3.S,v 1.5 2013/05/08 05:13:56 matt Exp $ */
+/* $NetBSD: divsi3.S,v 1.6 2013/06/20 07:16:23 matt Exp $ */
/*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
@@ -23,4 +23,15 @@ ENTRY_NP(__aeabi_idiv)
.symver __aeabi_idivmod,__aeabi_idivmod@@GCC_3.5
#endif
ENTRY(__divsi3)
+#if defined(__ARM_ARCH_EXT_IDIV__)
+# if defined(__ARM_EABI__)
+ mov r3, r0 @ save for mls
+# endif
+ sdiv r0, r0, r1
+# if defined(__ARM_EABI__)
+ mls r1, r0, r1, r3 @ return modulus in r1
+# endif
+ RET
+#else
b __divide
+#endif
Index: src/common/lib/libc/arch/arm/gen/udivsi3.S
diff -u src/common/lib/libc/arch/arm/gen/udivsi3.S:1.1 src/common/lib/libc/arch/arm/gen/udivsi3.S:1.2
--- src/common/lib/libc/arch/arm/gen/udivsi3.S:1.1 Tue Oct 30 12:42:13 2012
+++ src/common/lib/libc/arch/arm/gen/udivsi3.S Thu Jun 20 07:16:23 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: udivsi3.S,v 1.1 2012/10/30 12:42:13 christos Exp $ */
+/* $NetBSD: udivsi3.S,v 1.2 2013/06/20 07:16:23 matt Exp $ */
/*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
@@ -20,4 +20,15 @@
ENTRY_NP(__aeabi_uidivmod)
ENTRY_NP(__aeabi_uidiv)
ENTRY(__udivsi3)
+#if defined(__ARM_ARCH_EXT_IDIV__)
+# if defined(__ARM_EABI__)
+ mov r3, r0 @ save for mls
+# endif
+ udiv r0, r0, r1
+# if defined(__ARM_EABI__)
+ mls r1, r0, r1, r3 @ return modulus in r1
+# endif
+ RET
+#else
b __udivide
+#endif
