Module Name: src
Committed By: matt
Date: Sun Aug 18 06:29:29 UTC 2013
Modified Files:
src/sys/arch/arm/arm: blockio.S bus_space_asm_generic.S
bus_space_notimpl.S vectors.S
src/sys/arch/arm/arm32: bcopy_page.S setcpsr.S setstack.S
src/sys/arch/arm/mainbus: mainbus_io_asm.S
Log Message:
Move parts of cpu.h that are not needed by MI code in <arm/locore.h>
Don't include <machine/cpu.h> or <machine/frame.h>, use <arm/locore.h>
Use <arm/asm.h> instead of <machine/arm.h>
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/arm/blockio.S \
src/sys/arch/arm/arm/vectors.S
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/arm/bus_space_asm_generic.S
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/arm/bus_space_notimpl.S
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/arm32/bcopy_page.S
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/arm32/setcpsr.S
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/arm32/setstack.S
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/mainbus/mainbus_io_asm.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/blockio.S
diff -u src/sys/arch/arm/arm/blockio.S:1.7 src/sys/arch/arm/arm/blockio.S:1.8
--- src/sys/arch/arm/arm/blockio.S:1.7 Sun Aug 11 03:09:41 2013
+++ src/sys/arch/arm/arm/blockio.S Sun Aug 18 06:29:29 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: blockio.S,v 1.7 2013/08/11 03:09:41 matt Exp $ */
+/* $NetBSD: blockio.S,v 1.8 2013/08/18 06:29:29 matt Exp $ */
/*
* Copyright (c) 2001 Ben Harris.
@@ -48,7 +48,7 @@
#include <machine/asm.h>
-RCSID("$NetBSD: blockio.S,v 1.7 2013/08/11 03:09:41 matt Exp $")
+RCSID("$NetBSD: blockio.S,v 1.8 2013/08/18 06:29:29 matt Exp $")
/*
* Read bytes from an I/O address into a block of memory
@@ -101,6 +101,7 @@ ENTRY(read_multi_1)
ldrbgt r3, [r0]
strbgt r3, [r1], #1
ldmdb fp, {fp, sp, pc}
+END(read_multi_1)
/*
* Write bytes to an I/O address from a block of memory
@@ -152,6 +153,7 @@ ENTRY(write_multi_1)
ldrbgt r3, [r1], #1
strbgt r3, [r0]
ldmdb fp, {fp, sp, pc}
+END(write_multi_1)
/*
* Reads short ints (16 bits) from an I/O address into a block of memory
@@ -164,7 +166,7 @@ ENTRY(write_multi_1)
ENTRY(insw)
/* Make sure that we have a positive length */
cmp r2, #0x00000000
- movle pc, lr
+ RETc(le)
/* If the destination address and the size is word aligned, do it fast */
@@ -182,7 +184,7 @@ ENTRY(insw)
strb r3, [r1], #0x0001
bgt .Linswloop
- mov pc, lr
+ RET
/* Word aligned insw */
@@ -198,7 +200,8 @@ ENTRY(insw)
subs r2, r2, #0x00000002 /* Next */
bgt .Lfastinswloop
- mov pc, lr
+ RET
+END(insw)
/*
@@ -212,7 +215,7 @@ ENTRY(insw)
ENTRY(outsw)
/* Make sure that we have a positive length */
cmp r2, #0x00000000
- movle pc, lr
+ RETc(le)
/* If the destination address and the size is word aligned, do it fast */
@@ -231,7 +234,7 @@ ENTRY(outsw)
str r3, [r0]
bgt .Loutswloop
- mov pc, lr
+ RET
/* Word aligned outsw */
@@ -259,7 +262,8 @@ ENTRY(outsw)
bgt .Lfastoutswloop
- mov pc, lr
+ RET
+END(outsw)
/*
* reads short ints (16 bits) from an I/O address into a block of memory
@@ -274,7 +278,7 @@ ENTRY(outsw)
ENTRY(insw16)
/* Make sure that we have a positive length */
cmp r2, #0x00000000
- movle pc, lr
+ RETc(le)
/* If the destination address is word aligned and the size suitably
aligned, do it fast */
@@ -318,6 +322,7 @@ ENTRY(insw16)
bgt .Linsw16loop
pop {r4,r5,pc} /* Restore regs and go home */
+END(insw16)
/*
@@ -331,7 +336,7 @@ ENTRY(insw16)
ENTRY(outsw16)
/* Make sure that we have a positive length */
cmp r2, #0x00000000
- movle pc, lr
+ RETc(le)
/* If the destination address is word aligned and the size suitably
aligned, do it fast */
@@ -385,6 +390,7 @@ ENTRY(outsw16)
bgt .Loutsw16loop
pop {r4,r5,pc} /* and go home */
+END(outsw16)
/*
* reads short ints (16 bits) from an I/O address into a block of memory
@@ -400,7 +406,7 @@ ENTRY(outsw16)
ENTRY(inswm8)
/* Make sure that we have a positive length */
cmp r2, #0x00000000
- movle pc, lr
+ RETc(le)
/* If the destination address is word aligned and the size suitably
aligned, do it fast */
@@ -481,6 +487,7 @@ ENTRY(inswm8)
.Linswm8_l1:
pop {r4-r9,pc} /* And go home */
+END(inswm8)
/*
* write short ints (16 bits) to an I/O address from a block of memory
@@ -496,7 +503,7 @@ ENTRY(inswm8)
ENTRY(outswm8)
/* Make sure that we have a positive length */
cmp r2, #0x00000000
- movle pc, lr
+ RETc(le)
/* If the destination address is word aligned and the size suitably
aligned, do it fast */
@@ -585,3 +592,4 @@ ENTRY(outswm8)
.Loutswm8_l1:
pop {r4-r8,pc} /* And go home */
+END(outswm8)
Index: src/sys/arch/arm/arm/vectors.S
diff -u src/sys/arch/arm/arm/vectors.S:1.7 src/sys/arch/arm/arm/vectors.S:1.8
--- src/sys/arch/arm/arm/vectors.S:1.7 Wed Jun 12 21:34:12 2013
+++ src/sys/arch/arm/arm/vectors.S Sun Aug 18 06:29:29 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: vectors.S,v 1.7 2013/06/12 21:34:12 matt Exp $ */
+/* $NetBSD: vectors.S,v 1.8 2013/08/18 06:29:29 matt Exp $ */
/*
* Copyright (C) 1994-1997 Mark Brinicombe
@@ -69,6 +69,7 @@ _C_LABEL(page0rel):
#elif !defined(ARM_HAS_VBAR)
b .Lfiqvector
#endif
+END(page0rel)
#endif /* CPU_ARMV7 || CPU_ARM11 || ARM_HAS_VBAR */
#ifndef ARM_HAS_VBAR
@@ -85,6 +86,7 @@ _C_LABEL(page0):
#ifdef __ARM_FIQ_INDIRECT
ldr pc, .Lfiq_target
#endif
+END(page0)
#endif /* !ARM_HAS_VBAR */
#ifndef __ARM_FIQ_INDIRECT
.Lfiqvector:
Index: src/sys/arch/arm/arm/bus_space_asm_generic.S
diff -u src/sys/arch/arm/arm/bus_space_asm_generic.S:1.9 src/sys/arch/arm/arm/bus_space_asm_generic.S:1.10
--- src/sys/arch/arm/arm/bus_space_asm_generic.S:1.9 Tue Mar 19 17:11:13 2013
+++ src/sys/arch/arm/arm/bus_space_asm_generic.S Sun Aug 18 06:29:29 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space_asm_generic.S,v 1.9 2013/03/19 17:11:13 skrll Exp $ */
+/* $NetBSD: bus_space_asm_generic.S,v 1.10 2013/08/18 06:29:29 matt Exp $ */
/*
* Copyright (c) 1997 Causality Limited.
@@ -106,6 +106,7 @@ ENTRY_NP(generic_armv4_bs_w_2)
DSB
RET
END(generic_armv4_bs_w_2)
+END(generic_armv4_bs_w_2_swap)
#endif
ENTRY_NP(generic_bs_w_4_swap)
@@ -115,6 +116,7 @@ ENTRY_NP(generic_bs_w_4)
DSB
RET
END(generic_bs_w_4)
+END(generic_bs_w_4_swap)
/*
* read multiple
@@ -504,6 +506,7 @@ ENTRY_NP(generic_armv4_bs_sr_2)
DSB
RET
END(generic_armv4_bs_sr_2)
+END(generic_armv4_bs_sr_2_swap)
#endif
ENTRY_NP(generic_bs_sr_4_swap)
@@ -522,6 +525,7 @@ ENTRY_NP(generic_bs_sr_4)
DSB
RET
END(generic_bs_sr_4)
+END(generic_bs_sr_4_swap)
/*
* copy region
Index: src/sys/arch/arm/arm/bus_space_notimpl.S
diff -u src/sys/arch/arm/arm/bus_space_notimpl.S:1.4 src/sys/arch/arm/arm/bus_space_notimpl.S:1.5
--- src/sys/arch/arm/arm/bus_space_notimpl.S:1.4 Sun Dec 11 12:16:41 2005
+++ src/sys/arch/arm/arm/bus_space_notimpl.S Sun Aug 18 06:29:29 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space_notimpl.S,v 1.4 2005/12/11 12:16:41 christos Exp $ */
+/* $NetBSD: bus_space_notimpl.S,v 1.5 2013/08/18 06:29:29 matt Exp $ */
/*
* Copyright (c) 1997 Mark Brinicombe.
@@ -43,7 +43,7 @@
#define __C(x,y) __CONCAT(x,y)
#define __S(s) __STRING(s)
#define NAME(func) __C(BUS_SPACE,__C(_bs_,func))
-#define LNAME(func) __C(L,NAME(func))
+#define LNAME(func) __C(.L,NAME(func))
#define __L(x) _C_LABEL(x)
#define GLOBAL(func) .global __L(NAME(func))
@@ -56,22 +56,23 @@
#define NOT_IMPL(func) \
GLOBAL(func) ; \
LABEL(func) ; \
- stmfd sp!, {r0-r3} ; \
+ push {r0-r3} ; \
adr r1, LNAME(__C(func,_funcname)) ; \
mov r2, sp ; \
- b bs_notimpl_panic ; \
+ b .Lbs_notimpl_panic ; \
; \
LLABEL(__C(func,_funcname)) ; \
.asciz __S(func) ; \
.align 0 ; \
+ END(NAME(func))
-bs_notimpl_message:
+.Lbs_notimpl_message:
.ascii __S(BUS_SPACE)
.asciz "_%s: args at %p"
.align 0
-bs_notimpl_panic:
- adr r0, bs_notimpl_message
+.Lbs_notimpl_panic:
+ adr r0, .Lbs_notimpl_message
b _C_LABEL(panic)
/*
Index: src/sys/arch/arm/arm32/bcopy_page.S
diff -u src/sys/arch/arm/arm32/bcopy_page.S:1.8 src/sys/arch/arm/arm32/bcopy_page.S:1.9
--- src/sys/arch/arm/arm32/bcopy_page.S:1.8 Sun Dec 11 12:16:41 2005
+++ src/sys/arch/arm/arm32/bcopy_page.S Sun Aug 18 06:29:29 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: bcopy_page.S,v 1.8 2005/12/11 12:16:41 christos Exp $ */
+/* $NetBSD: bcopy_page.S,v 1.9 2013/08/18 06:29:29 matt Exp $ */
/*
* Copyright (c) 1995 Scott Stevens
@@ -73,8 +73,8 @@
#endif /* ! COPY_CHUNK */
#ifndef SAVE_REGS
-#define SAVE_REGS stmfd sp!, {r4-r8, lr}
-#define RESTORE_REGS ldmfd sp!, {r4-r8, pc}
+#define SAVE_REGS push {r4-r8, lr}
+#define RESTORE_REGS pop {r4-r8, pc}
#endif
ENTRY(bcopy_page)
@@ -115,6 +115,7 @@ ENTRY(bcopy_page)
bne 1b
RESTORE_REGS /* ...and return. */
+END(bcopy_page)
/*
* bzero_page(dest)
@@ -130,7 +131,7 @@ ENTRY(bcopy_page)
*/
ENTRY(bzero_page)
- stmfd sp!, {r4-r8, lr}
+ push {r4-r8, lr}
#ifdef BIG_LOOPS
mov r2, #(PAGE_SIZE >> 9)
#else
@@ -175,7 +176,8 @@ ENTRY(bzero_page)
subs r2, r2, #1
bne 1b
- ldmfd sp!, {r4-r8, pc}
+ pop {r4-r8, pc}
+END(bzero_page)
#else /* __XSCALE__ */
@@ -184,7 +186,7 @@ ENTRY(bzero_page)
*/
ENTRY(bcopy_page)
pld [r0]
- stmfd sp!, {r4, r5}
+ push {r4, r5}
mov ip, #32
ldr r2, [r0], #0x04 /* 0x00 */
ldr r3, [r0], #0x04 /* 0x04 */
@@ -242,8 +244,9 @@ ENTRY(bcopy_page)
ldrgt r3, [r0], #0x04 /* 0x84 */
strd r4, [r1], #0x08
bgt 1b
- ldmfd sp!, {r4, r5}
- mov pc, lr
+ pop {r4, r5}
+ RET
+END(bcopy_page)
/*
* XSCALE version of bzero_page
@@ -270,5 +273,6 @@ ENTRY(bzero_page)
strd r2, [r0], #8
subs r1, r1, #128
bne 1b
- mov pc, lr
+ RET
+END(bzero_page)
#endif /* __XSCALE__ */
Index: src/sys/arch/arm/arm32/setcpsr.S
diff -u src/sys/arch/arm/arm32/setcpsr.S:1.2 src/sys/arch/arm/arm32/setcpsr.S:1.3
--- src/sys/arch/arm/arm32/setcpsr.S:1.2 Thu Aug 15 01:37:02 2002
+++ src/sys/arch/arm/arm32/setcpsr.S Sun Aug 18 06:29:29 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: setcpsr.S,v 1.2 2002/08/15 01:37:02 briggs Exp $ */
+/* $NetBSD: setcpsr.S,v 1.3 2013/08/18 06:29:29 matt Exp $ */
/*
* Copyright (c) 1994 Mark Brinicombe.
@@ -63,7 +63,8 @@ ENTRY_NP(SetCPSR)
mov r0, r3 /* Return the old CPSR */
- mov pc, lr
+ RET
+END(SetCPSR)
/* Gets the CPSR register
@@ -73,6 +74,5 @@ ENTRY_NP(SetCPSR)
ENTRY_NP(GetCPSR)
mrs r0, cpsr /* Get the CPSR */
-
- mov pc, lr
-
+ RET
+END(GetCPSR)
Index: src/sys/arch/arm/arm32/setstack.S
diff -u src/sys/arch/arm/arm32/setstack.S:1.5 src/sys/arch/arm/arm32/setstack.S:1.6
--- src/sys/arch/arm/arm32/setstack.S:1.5 Thu Feb 16 02:35:52 2012
+++ src/sys/arch/arm/arm32/setstack.S Sun Aug 18 06:29:29 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: setstack.S,v 1.5 2012/02/16 02:35:52 christos Exp $ */
+/* $NetBSD: setstack.S,v 1.6 2013/08/18 06:29:29 matt Exp $ */
/*
* Copyright (c) 1994 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include <arm/armreg.h>
#include <machine/asm.h>
- RCSID("$NetBSD: setstack.S,v 1.5 2012/02/16 02:35:52 christos Exp $")
+ RCSID("$NetBSD: setstack.S,v 1.6 2013/08/18 06:29:29 matt Exp $")
/* To set the stack pointer for a particular mode we must switch
* to that mode update the banked r13 and then switch back.
@@ -69,7 +69,8 @@ ENTRY(set_stackptr)
msr cpsr_c, r3 /* Restore the old mode */
- mov pc, lr /* Exit */
+ RET /* Exit */
+END(set_stackptr)
/* To get the stack pointer for a particular mode we must switch
* to that mode copy the banked r13 and then switch back.
@@ -84,10 +85,11 @@ ENTRY(get_stackptr)
orr r2, r2, r0
msr cpsr_c, r2
- mov r0, sp /* Set the stack pointer */
+ mov r0, sp /* Get the stack pointer */
msr cpsr_c, r3 /* Restore the old mode */
- mov pc, lr /* Exit */
+ RET /* Exit */
+END(get_stackptr)
/* End of setstack.S */
Index: src/sys/arch/arm/mainbus/mainbus_io_asm.S
diff -u src/sys/arch/arm/mainbus/mainbus_io_asm.S:1.1 src/sys/arch/arm/mainbus/mainbus_io_asm.S:1.2
--- src/sys/arch/arm/mainbus/mainbus_io_asm.S:1.1 Sat Feb 24 19:38:02 2001
+++ src/sys/arch/arm/mainbus/mainbus_io_asm.S Sun Aug 18 06:29:29 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: mainbus_io_asm.S,v 1.1 2001/02/24 19:38:02 reinoud Exp $ */
+/* $NetBSD: mainbus_io_asm.S,v 1.2 2013/08/18 06:29:29 matt Exp $ */
/*
* Copyright (c) 1997 Mark Brinicombe.
@@ -45,17 +45,20 @@
ENTRY(mainbus_bs_r_1)
ldrb r0, [r1, r2, lsl #2]
- mov pc, lr
+ RET
+END(mainbus_bs_r_1)
ENTRY(mainbus_bs_r_2)
ldr r0, [r1, r2, lsl #2]
bic r0, r0, #0xff000000
bic r0, r0, #0x00ff0000
- mov pc, lr
+ RET
+END(mainbus_bs_r_2)
ENTRY(mainbus_bs_r_4)
ldr r0, [r1, r2, lsl #2]
- mov pc, lr
+ RET
+END(mainbus_bs_r_4)
/*
* write single
@@ -63,17 +66,20 @@ ENTRY(mainbus_bs_r_4)
ENTRY(mainbus_bs_w_1)
strb r3, [r1, r2, lsl #2]
- mov pc, lr
+ RET
+END(mainbus_bs_w_1)
ENTRY(mainbus_bs_w_2)
mov r3, r3, lsl #16
orr r3, r3, r3, lsr #16
str r3, [r1, r2, lsl #2]
- mov pc, lr
+ RET
+END(mainbus_bs_w_2)
ENTRY(mainbus_bs_w_4)
str r3, [r1, r2, lsl #2]
- mov pc, lr
+ RET
+END(mainbus_bs_w_4)
/*
* read multiple
@@ -84,6 +90,7 @@ ENTRY(mainbus_bs_rm_2)
mov r1, r3
ldr r2, [sp, #0]
b _C_LABEL(insw16)
+END(mainbus_bs_rm_2)
/*
* write multiple
@@ -95,18 +102,20 @@ ENTRY(mainbus_bs_wm_1)
/* Make sure that we have a positive length */
cmp r2, #0x00000000
- movle pc, lr
+ RETc(le)
-mainbus_wm_1_loop:
+.Lmainbus_wm_1_loop:
ldrb r1, [r3], #0x0001
str r1, [r0]
subs r2, r2, #0x00000001
- bgt mainbus_wm_1_loop
+ bgt .Lmainbus_wm_1_loop
- mov pc, lr
+ RET
+END(mainbus_bs_wm_1)
ENTRY(mainbus_bs_wm_2)
add r0, r1, r2, lsl #2
mov r1, r3
ldr r2, [sp, #0]
b _C_LABEL(outsw16)
+END(mainbus_bs_wm_2)
