Module Name: src
Committed By: kiyohara
Date: Mon Dec 23 04:12:09 UTC 2013
Modified Files:
src/sys/arch/arm/marvell: armadaxp.c kirkwood.c mvsoc.c mvsocreg.h
mvsocvar.h
src/sys/arch/evbarm/armadaxp: armadaxp_machdep.c
src/sys/arch/evbarm/marvell: marvell_machdep.c
Log Message:
Support to check the clock gating for Armada XP in armadaxp.c.
Also move the checking for clock gate of Kirkwood into kirkwood.c.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/marvell/armadaxp.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/marvell/kirkwood.c \
src/sys/arch/arm/marvell/mvsocreg.h
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/marvell/mvsoc.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/marvell/mvsocvar.h
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/evbarm/armadaxp/armadaxp_machdep.c
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/evbarm/marvell/marvell_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/marvell/armadaxp.c
diff -u src/sys/arch/arm/marvell/armadaxp.c:1.5 src/sys/arch/arm/marvell/armadaxp.c:1.6
--- src/sys/arch/arm/marvell/armadaxp.c:1.5 Mon Dec 23 03:19:43 2013
+++ src/sys/arch/arm/marvell/armadaxp.c Mon Dec 23 04:12:09 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: armadaxp.c,v 1.5 2013/12/23 03:19:43 kiyohara Exp $ */
+/* $NetBSD: armadaxp.c,v 1.6 2013/12/23 04:12:09 kiyohara Exp $ */
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
@@ -37,7 +37,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBI
*******************************************************************************/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: armadaxp.c,v 1.5 2013/12/23 03:19:43 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: armadaxp.c,v 1.6 2013/12/23 04:12:09 kiyohara Exp $");
#define _INTR_PRIVATE
@@ -149,6 +149,37 @@ static struct pic_softc armadaxp_pic = {
.pic_name = "armadaxp",
};
+static struct {
+ bus_size_t offset;
+ uint32_t bits;
+} clkgatings[]= {
+ { ARMADAXP_GBE3_BASE, (1 << 1) },
+ { ARMADAXP_GBE2_BASE, (1 << 2) },
+ { ARMADAXP_GBE1_BASE, (1 << 3) },
+ { ARMADAXP_GBE0_BASE, (1 << 4) },
+ { MVSOC_PEX_BASE, (1 << 5) },
+ { ARMADAXP_PEX01_BASE, (1 << 6) },
+ { ARMADAXP_PEX02_BASE, (1 << 7) },
+ { ARMADAXP_PEX03_BASE, (1 << 8) },
+ { ARMADAXP_PEX10_BASE, (1 << 9) },
+ { ARMADAXP_PEX11_BASE, (1 << 10) },
+ { ARMADAXP_PEX12_BASE, (1 << 11) },
+ { ARMADAXP_PEX13_BASE, (1 << 12) },
+#if 0
+ { NetA, (1 << 13) },
+#endif
+ { ARMADAXP_SATAHC_BASE, (1 << 14) | (1 << 15) | (1 << 29) | (1 << 30) },
+ { ARMADAXP_LCD_BASE, (1 << 16) },
+ { ARMADAXP_SDIO_BASE, (1 << 17) },
+ { ARMADAXP_USB1_BASE, (1 << 19) },
+ { ARMADAXP_USB2_BASE, (1 << 20) },
+ { ARMADAXP_PEX2_BASE, (1 << 26) },
+ { ARMADAXP_PEX3_BASE, (1 << 27) },
+#if 0
+ { DDR, (1 << 28) },
+#endif
+};
+
/*
* armadaxp_intr_bootstrap:
*
@@ -420,3 +451,22 @@ armadaxp_io_coherency_init(void)
/* Mark as enabled */
iocc_state = 1;
}
+
+int
+armadaxp_clkgating(struct marvell_attach_args *mva)
+{
+ uint32_t val;
+ int i;
+
+ for (i = 0; i < __arraycount(clkgatings); i++) {
+ if (clkgatings[i].offset == mva->mva_offset) {
+ val = read_miscreg(ARMADAXP_MISC_PMCGC);
+ if ((val & clkgatings[i].bits) == clkgatings[i].bits)
+ /* Clock enabled */
+ return 0;
+ return 1;
+ }
+ }
+ /* Clock Gating not support */
+ return 0;
+}
Index: src/sys/arch/arm/marvell/kirkwood.c
diff -u src/sys/arch/arm/marvell/kirkwood.c:1.7 src/sys/arch/arm/marvell/kirkwood.c:1.8
--- src/sys/arch/arm/marvell/kirkwood.c:1.7 Thu Sep 6 03:05:41 2012
+++ src/sys/arch/arm/marvell/kirkwood.c Mon Dec 23 04:12:09 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: kirkwood.c,v 1.7 2012/09/06 03:05:41 msaitoh Exp $ */
+/* $NetBSD: kirkwood.c,v 1.8 2013/12/23 04:12:09 kiyohara Exp $ */
/*
* Copyright (c) 2010 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: kirkwood.c,v 1.7 2012/09/06 03:05:41 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: kirkwood.c,v 1.8 2013/12/23 04:12:09 kiyohara Exp $");
#define _INTR_PRIVATE
@@ -88,6 +88,27 @@ static struct pic_softc kirkwood_pic = {
.pic_name = "kirkwood",
};
+static struct {
+ bus_size_t offset;
+ uint32_t bits;
+} clkgatings[]= {
+ { KIRKWOOD_GBE0_BASE, (1 << 0) },
+ { MVSOC_PEX_BASE, (1 << 2) },
+ { KIRKWOOD_USB_BASE, (1 << 3) },
+ { KIRKWOOD_SDIO_BASE, (1 << 4) },
+ { KIRKWOOD_MTS_BASE, (1 << 5) },
+#if 0
+ { Dunit, (1 << 6) }, /* SDRAM Unit Clock */
+ { Runit, (1 << 7) }, /* Runit Clock */
+#endif
+ { KIRKWOOD_IDMAC_BASE, (1 << 8) | (1 << 16) },
+ { KIRKWOOD_AUDIO_BASE, (1 << 9) },
+ { KIRKWOOD_SATAHC_BASE, (1 << 14) | (1 << 15) },
+ { KIRKWOOD_CESA_BASE, (1 << 17) },
+ { KIRKWOOD_GBE1_BASE, (1 << 19) },
+ { KIRKWOOD_TDM_BASE, (1 << 20) },
+};
+
/*
* kirkwood_intr_bootstrap:
@@ -260,3 +281,22 @@ kirkwood_getclks(bus_addr_t iobase)
#undef MHz
}
+
+int
+kirkwood_clkgating(struct marvell_attach_args *mva)
+{
+ uint32_t val;
+ int i;
+
+ for (i = 0; i < __arraycount(clkgatings); i++) {
+ if (clkgatings[i].offset == mva->mva_offset) {
+ val = read_mlmbreg(MVSOC_MLMB_CLKGATING);
+ if ((val & clkgatings[i].bits) == clkgatings[i].bits)
+ /* Clock enabled */
+ return 0;
+ return 1;
+ }
+ }
+ /* Clock Gating not support */
+ return 0;
+}
Index: src/sys/arch/arm/marvell/mvsocreg.h
diff -u src/sys/arch/arm/marvell/mvsocreg.h:1.7 src/sys/arch/arm/marvell/mvsocreg.h:1.8
--- src/sys/arch/arm/marvell/mvsocreg.h:1.7 Mon Dec 23 03:19:43 2013
+++ src/sys/arch/arm/marvell/mvsocreg.h Mon Dec 23 04:12:09 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsocreg.h,v 1.7 2013/12/23 03:19:43 kiyohara Exp $ */
+/* $NetBSD: mvsocreg.h,v 1.8 2013/12/23 04:12:09 kiyohara Exp $ */
/*
* Copyright (c) 2007, 2008 KIYOHARA Takashi
* All rights reserved.
@@ -112,6 +112,10 @@
#define MVSOC_MLMB_MLMBIMR 0x114 /*Mb-L to Mb Bridge Intr Mask */
#define MVSOC_MLMB_CLKGATING 0x11c /* Clock Gating Control */
+#define MVSOC_MLMB_CLKGATING_LNR (1 << 13) /* Load New Ratio */
+#define MVSOC_MLMB_CLKGATING_GPH (1 << 12) /* Go To Power Half */
+#define MVSOC_MLMB_CLKGATING_GPS (1 << 11) /* Go To Power Save */
+#define MVSOC_MLMB_CLKGATING_CR (1 << 10) /* Production Realignment */
#define MVSOC_MLMB_CLKGATING_BIT(n) (1 << (n))
#define MVSOC_MLMB_L2CFG 0x128 /* L2 Cache Config */
Index: src/sys/arch/arm/marvell/mvsoc.c
diff -u src/sys/arch/arm/marvell/mvsoc.c:1.15 src/sys/arch/arm/marvell/mvsoc.c:1.16
--- src/sys/arch/arm/marvell/mvsoc.c:1.15 Mon Dec 23 03:19:43 2013
+++ src/sys/arch/arm/marvell/mvsoc.c Mon Dec 23 04:12:09 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsoc.c,v 1.15 2013/12/23 03:19:43 kiyohara Exp $ */
+/* $NetBSD: mvsoc.c,v 1.16 2013/12/23 04:12:09 kiyohara Exp $ */
/*
* Copyright (c) 2007, 2008 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.15 2013/12/23 03:19:43 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.16 2013/12/23 04:12:09 kiyohara Exp $");
#include "opt_cputypes.h"
#include "opt_mvsoc.h"
@@ -70,6 +70,7 @@ static vaddr_t regbase = 0xffffffff, dsc
vaddr_t mlmb_base;
void (*mvsoc_intr_init)(void);
+int (*mvsoc_clkgating)(struct marvell_attach_args *);
#ifdef MVSOC_CONSOLE_EARLY
@@ -345,7 +346,6 @@ static const struct mvsoc_periph {
int unit;
bus_size_t offset;
int irq;
- uint32_t clkpwr_bit;
} mvsoc_periphs[] = {
#if defined(ORION)
#define ORION_IRQ_TMR (32 + MVSOC_MLMB_MLMBI_CPUTIMER0INTREQ)
@@ -490,23 +490,15 @@ static const struct mvsoc_periph {
{ KIRKWOOD(88F6281),"mvsocrtc",0, KIRKWOOD_RTC_BASE,IRQ_DEFAULT },
{ KIRKWOOD(88F6281),"com", 0, MVSOC_COM0_BASE, KIRKWOOD_IRQ_UART0INT },
{ KIRKWOOD(88F6281),"com", 1, MVSOC_COM1_BASE, KIRKWOOD_IRQ_UART1INT },
- { KIRKWOOD(88F6281),"ehci", 0, KIRKWOOD_USB_BASE,KIRKWOOD_IRQ_USB0CNT,
- MVSOC_MLMB_CLKGATING_BIT(3) },
+ { KIRKWOOD(88F6281),"ehci", 0, KIRKWOOD_USB_BASE,KIRKWOOD_IRQ_USB0CNT },
{ KIRKWOOD(88F6281),"gtidmac", 0, KIRKWOOD_IDMAC_BASE,IRQ_DEFAULT },
{ KIRKWOOD(88F6281),"gttwsi", 0, MVSOC_TWSI_BASE, KIRKWOOD_IRQ_TWSI },
- { KIRKWOOD(88F6281),"mvcesa", 0, KIRKWOOD_CESA_BASE,KIRKWOOD_IRQ_SECURITYINT,
- MVSOC_MLMB_CLKGATING_BIT(17) },
- { KIRKWOOD(88F6281),"mvgbec", 0, KIRKWOOD_GBE0_BASE,IRQ_DEFAULT,
- MVSOC_MLMB_CLKGATING_BIT(0) },
- { KIRKWOOD(88F6281),"mvgbec", 1, KIRKWOOD_GBE1_BASE,IRQ_DEFAULT,
- MVSOC_MLMB_CLKGATING_BIT(19) },
- { KIRKWOOD(88F6281),"mvpex", 0, MVSOC_PEX_BASE, KIRKWOOD_IRQ_PEX0INT,
- MVSOC_MLMB_CLKGATING_BIT(2) },
- { KIRKWOOD(88F6281),"mvsata", 0, KIRKWOOD_SATAHC_BASE,KIRKWOOD_IRQ_SATA,
- MVSOC_MLMB_CLKGATING_BIT(14) |
- MVSOC_MLMB_CLKGATING_BIT(15) },
- { KIRKWOOD(88F6281),"mvsdio", 0, KIRKWOOD_SDIO_BASE,KIRKWOOD_IRQ_SDIOINT,
- MVSOC_MLMB_CLKGATING_BIT(4) },
+ { KIRKWOOD(88F6281),"mvcesa", 0, KIRKWOOD_CESA_BASE,KIRKWOOD_IRQ_SECURITYINT },
+ { KIRKWOOD(88F6281),"mvgbec", 0, KIRKWOOD_GBE0_BASE,IRQ_DEFAULT },
+ { KIRKWOOD(88F6281),"mvgbec", 1, KIRKWOOD_GBE1_BASE,IRQ_DEFAULT },
+ { KIRKWOOD(88F6281),"mvpex", 0, MVSOC_PEX_BASE, KIRKWOOD_IRQ_PEX0INT },
+ { KIRKWOOD(88F6281),"mvsata", 0, KIRKWOOD_SATAHC_BASE,KIRKWOOD_IRQ_SATA },
+ { KIRKWOOD(88F6281),"mvsdio", 0, KIRKWOOD_SDIO_BASE,KIRKWOOD_IRQ_SDIOINT },
{ KIRKWOOD(88F6282),"mvsoctmr",0, MVSOC_TMR_BASE, KIRKWOOD_IRQ_TMR },
{ KIRKWOOD(88F6282),"mvsocgpp",0, MVSOC_GPP_BASE, KIRKWOOD_IRQ_GPIOLO7_0},
@@ -561,7 +553,7 @@ static const struct mvsoc_periph {
{ ARMADAXP(MV78130), "com", 1, MVSOC_COM1_BASE, ARMADAXP_IRQ_UART1 },
{ ARMADAXP(MV78130), "com", 2, ARMADAXP_COM2_BASE,ARMADAXP_IRQ_UART2 },
{ ARMADAXP(MV78130), "com", 3, ARMADAXP_COM3_BASE,ARMADAXP_IRQ_UART3 },
- { ARMADAXP(MV78130), "mvsocrtc",0, ARMADAXP_RTC_BASE,ARMADAXP_IRQ_RTC },
+ { ARMADAXP(MV78130), "mvsocrtc",0,ARMADAXP_RTC_BASE,ARMADAXP_IRQ_RTC },
{ ARMADAXP(MV78130), "gttwsi", 0, MVSOC_TWSI_BASE, ARMADAXP_IRQ_TWSI0 },
{ ARMADAXP(MV78130), "gttwsi", 1, ARMADAXP_TWSI1_BASE,ARMADAXP_IRQ_TWSI1 },
{ ARMADAXP(MV78130), "gtidmac",0, ARMADAXP_XORE0_BASE,IRQ_DEFAULT },
@@ -587,7 +579,7 @@ static const struct mvsoc_periph {
{ ARMADAXP(MV78160), "com", 1, MVSOC_COM1_BASE, ARMADAXP_IRQ_UART1 },
{ ARMADAXP(MV78160), "com", 2, ARMADAXP_COM2_BASE,ARMADAXP_IRQ_UART2 },
{ ARMADAXP(MV78160), "com", 3, ARMADAXP_COM3_BASE,ARMADAXP_IRQ_UART3 },
- { ARMADAXP(MV78160), "mvsocrtc",0, ARMADAXP_RTC_BASE,ARMADAXP_IRQ_RTC },
+ { ARMADAXP(MV78160), "mvsocrtc",0,ARMADAXP_RTC_BASE,ARMADAXP_IRQ_RTC },
{ ARMADAXP(MV78160), "gttwsi", 0, MVSOC_TWSI_BASE, ARMADAXP_IRQ_TWSI0 },
{ ARMADAXP(MV78160), "gttwsi", 1, ARMADAXP_TWSI1_BASE,ARMADAXP_IRQ_TWSI1 },
{ ARMADAXP(MV78160), "gtidmac",0, ARMADAXP_XORE0_BASE,IRQ_DEFAULT },
@@ -615,7 +607,7 @@ static const struct mvsoc_periph {
{ ARMADAXP(MV78230), "com", 1, MVSOC_COM1_BASE, ARMADAXP_IRQ_UART1 },
{ ARMADAXP(MV78230), "com", 2, ARMADAXP_COM2_BASE,ARMADAXP_IRQ_UART2 },
{ ARMADAXP(MV78230), "com", 3, ARMADAXP_COM3_BASE,ARMADAXP_IRQ_UART3 },
- { ARMADAXP(MV78230), "mvsocrtc",0, ARMADAXP_RTC_BASE,ARMADAXP_IRQ_RTC },
+ { ARMADAXP(MV78230), "mvsocrtc",0,ARMADAXP_RTC_BASE,ARMADAXP_IRQ_RTC },
{ ARMADAXP(MV78230), "gttwsi", 0, MVSOC_TWSI_BASE, ARMADAXP_IRQ_TWSI0 },
{ ARMADAXP(MV78230), "gttwsi", 1, ARMADAXP_TWSI1_BASE,ARMADAXP_IRQ_TWSI1 },
{ ARMADAXP(MV78230), "gtidmac",0, ARMADAXP_XORE0_BASE,IRQ_DEFAULT },
@@ -642,7 +634,7 @@ static const struct mvsoc_periph {
{ ARMADAXP(MV78260), "com", 1, MVSOC_COM1_BASE, ARMADAXP_IRQ_UART1 },
{ ARMADAXP(MV78260), "com", 2, ARMADAXP_COM2_BASE,ARMADAXP_IRQ_UART2 },
{ ARMADAXP(MV78260), "com", 3, ARMADAXP_COM3_BASE,ARMADAXP_IRQ_UART3 },
- { ARMADAXP(MV78260), "mvsocrtc",0, ARMADAXP_RTC_BASE,ARMADAXP_IRQ_RTC },
+ { ARMADAXP(MV78260), "mvsocrtc",0,ARMADAXP_RTC_BASE,ARMADAXP_IRQ_RTC },
{ ARMADAXP(MV78260), "gttwsi", 0, MVSOC_TWSI_BASE, ARMADAXP_IRQ_TWSI0 },
{ ARMADAXP(MV78260), "gttwsi", 1, ARMADAXP_TWSI1_BASE,ARMADAXP_IRQ_TWSI1 },
{ ARMADAXP(MV78260), "gtidmac",0, ARMADAXP_XORE0_BASE,IRQ_DEFAULT },
@@ -670,7 +662,7 @@ static const struct mvsoc_periph {
{ ARMADAXP(MV78460), "com", 1, MVSOC_COM1_BASE, ARMADAXP_IRQ_UART1 },
{ ARMADAXP(MV78460), "com", 2, ARMADAXP_COM2_BASE,ARMADAXP_IRQ_UART2 },
{ ARMADAXP(MV78460), "com", 3, ARMADAXP_COM3_BASE,ARMADAXP_IRQ_UART3 },
- { ARMADAXP(MV78460), "mvsocrtc",0, ARMADAXP_RTC_BASE,ARMADAXP_IRQ_RTC },
+ { ARMADAXP(MV78460), "mvsocrtc",0,ARMADAXP_RTC_BASE,ARMADAXP_IRQ_RTC },
{ ARMADAXP(MV78460), "gttwsi", 0, MVSOC_TWSI_BASE, ARMADAXP_IRQ_TWSI0 },
{ ARMADAXP(MV78460), "gttwsi", 1, ARMADAXP_TWSI1_BASE,ARMADAXP_IRQ_TWSI1 },
{ ARMADAXP(MV78460), "gtidmac",0, ARMADAXP_XORE0_BASE,IRQ_DEFAULT },
@@ -716,7 +708,6 @@ mvsoc_attach(device_t parent, device_t s
struct marvell_attach_args mva;
uint16_t model;
uint8_t rev;
- uint32_t clkpwr, clkpwrbit;
int i;
sc->sc_dev = self;
@@ -756,20 +747,6 @@ mvsoc_attach(device_t parent, device_t s
if (mvsoc_periphs[i].model != model)
continue;
- /* Skip clock disabled devices */
- clkpwrbit = mvsoc_periphs[i].clkpwr_bit;
- if (clkpwrbit != 0) {
- clkpwr = read_mlmbreg(MVSOC_MLMB_CLKGATING);
-
- if ((clkpwr & clkpwrbit) == 0) {
- aprint_normal("%s: %s%d clock disabled\n",
- device_xname(self),
- mvsoc_periphs[i].name,
- mvsoc_periphs[i].unit);
- continue;
- }
- }
-
mva.mva_name = mvsoc_periphs[i].name;
mva.mva_model = model;
mva.mva_revision = rev;
@@ -782,6 +759,13 @@ mvsoc_attach(device_t parent, device_t s
mva.mva_dmat = sc->sc_dmat;
mva.mva_irq = mvsoc_periphs[i].irq;
+ /* Skip clock disabled devices */
+ if (mvsoc_clkgating != NULL && mvsoc_clkgating(&mva)) {
+ aprint_normal_dev(self, "%s%d clock disabled\n",
+ mvsoc_periphs[i].name, mvsoc_periphs[i].unit);
+ continue;
+ }
+
config_found_sm_loc(sc->sc_dev, "mvsoc", NULL, &mva,
mvsoc_print, mvsoc_search);
}
Index: src/sys/arch/arm/marvell/mvsocvar.h
diff -u src/sys/arch/arm/marvell/mvsocvar.h:1.6 src/sys/arch/arm/marvell/mvsocvar.h:1.7
--- src/sys/arch/arm/marvell/mvsocvar.h:1.6 Mon Dec 23 03:19:43 2013
+++ src/sys/arch/arm/marvell/mvsocvar.h Mon Dec 23 04:12:09 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsocvar.h,v 1.6 2013/12/23 03:19:43 kiyohara Exp $ */
+/* $NetBSD: mvsocvar.h,v 1.7 2013/12/23 04:12:09 kiyohara Exp $ */
/*
* Copyright (c) 2007, 2010 KIYOHARA Takashi
* All rights reserved.
@@ -122,16 +122,20 @@ enum mvsoc_tags {
};
int mvsoc_target(int, uint32_t *, uint32_t *, uint32_t *, uint32_t *);
+extern int (*mvsoc_clkgating)(struct marvell_attach_args *);
+
void orion_intr_bootstrap(void);
void orion_getclks(bus_addr_t);
void kirkwood_intr_bootstrap(void);
void kirkwood_getclks(bus_addr_t);
+int kirkwood_clkgating(struct marvell_attach_args *);
void mv78xx0_intr_bootstrap(void);
void mv78xx0_getclks(bus_addr_t);
void armadaxp_intr_bootstrap(bus_addr_t);
void armadaxp_getclks(void);
+int armadaxp_clkgating(struct marvell_attach_args *);
#endif /* _MVSOCVAR_H_ */
Index: src/sys/arch/evbarm/armadaxp/armadaxp_machdep.c
diff -u src/sys/arch/evbarm/armadaxp/armadaxp_machdep.c:1.5 src/sys/arch/evbarm/armadaxp/armadaxp_machdep.c:1.6
--- src/sys/arch/evbarm/armadaxp/armadaxp_machdep.c:1.5 Mon Dec 23 03:19:43 2013
+++ src/sys/arch/evbarm/armadaxp/armadaxp_machdep.c Mon Dec 23 04:12:09 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: armadaxp_machdep.c,v 1.5 2013/12/23 03:19:43 kiyohara Exp $ */
+/* $NetBSD: armadaxp_machdep.c,v 1.6 2013/12/23 04:12:09 kiyohara Exp $ */
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
@@ -37,7 +37,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBI
*******************************************************************************/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: armadaxp_machdep.c,v 1.5 2013/12/23 03:19:43 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: armadaxp_machdep.c,v 1.6 2013/12/23 04:12:09 kiyohara Exp $");
#include "opt_machdep.h"
#include "opt_mvsoc.h"
@@ -356,6 +356,7 @@ initarm(void *arg)
extern vaddr_t misc_base;
misc_base = MARVELL_INTERREGS_VBASE + ARMADAXP_MISC_BASE;
armadaxp_getclks();
+ mvsoc_clkgating = armadaxp_clkgating;
/* Preconfigure interrupts */
armadaxp_intr_bootstrap(MARVELL_INTERREGS_PBASE);
Index: src/sys/arch/evbarm/marvell/marvell_machdep.c
diff -u src/sys/arch/evbarm/marvell/marvell_machdep.c:1.25 src/sys/arch/evbarm/marvell/marvell_machdep.c:1.26
--- src/sys/arch/evbarm/marvell/marvell_machdep.c:1.25 Mon Dec 23 03:19:43 2013
+++ src/sys/arch/evbarm/marvell/marvell_machdep.c Mon Dec 23 04:12:09 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: marvell_machdep.c,v 1.25 2013/12/23 03:19:43 kiyohara Exp $ */
+/* $NetBSD: marvell_machdep.c,v 1.26 2013/12/23 04:12:09 kiyohara Exp $ */
/*
* Copyright (c) 2007, 2008, 2010 KIYOHARA Takashi
* All rights reserved.
@@ -25,7 +25,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: marvell_machdep.c,v 1.25 2013/12/23 03:19:43 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: marvell_machdep.c,v 1.26 2013/12/23 04:12:09 kiyohara Exp $");
#include "opt_evbarm_boardtype.h"
#include "opt_ddb.h"
@@ -314,6 +314,7 @@ initarm(void *arg)
nremap = KIRKWOOD_MLMB_NREMAP;
kirkwood_getclks(MARVELL_INTERREGS_VBASE);
+ mvsoc_clkgating = kirkwood_clkgating;
break;
#endif /* KIRKWOOD */
@@ -351,6 +352,7 @@ initarm(void *arg)
extern vaddr_t misc_base;
misc_base = MARVELL_INTERREGS_VBASE + ARMADAXP_MISC_BASE;
armadaxp_getclks();
+ mvsoc_clkgating = armadaxp_clkgating;
#ifdef L2CACHE_ENABLE
/* Initialize L2 Cache */
