Module Name:    src
Committed By:   msaitoh
Date:           Mon Jan 20 01:10:38 UTC 2014

Modified Files:
        src/sys/dev/pci: pucdata.c

Log Message:
 Fix a bug that EG20T's UARTs from #1 to #3 never match.
Tested with my MinnowBoard.


To generate a diff of this commit:
cvs rdiff -u -r1.89 -r1.90 src/sys/dev/pci/pucdata.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/pucdata.c
diff -u src/sys/dev/pci/pucdata.c:1.89 src/sys/dev/pci/pucdata.c:1.90
--- src/sys/dev/pci/pucdata.c:1.89	Wed Dec 25 16:05:59 2013
+++ src/sys/dev/pci/pucdata.c	Mon Jan 20 01:10:38 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: pucdata.c,v 1.89 2013/12/25 16:05:59 msaitoh Exp $	*/
+/*	$NetBSD: pucdata.c,v 1.90 2014/01/20 01:10:38 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 1998, 1999 Christopher G. Demetriou.  All rights reserved.
@@ -36,7 +36,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.89 2013/12/25 16:05:59 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.90 2014/01/20 01:10:38 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -1852,7 +1852,7 @@ const struct puc_device_description puc_
 
 	/* Intel EG20T UART */
 	{   "Intel EG20T UART #1",
-	    {	PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_1, 0, 1 },
+	    {	PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_1, 0, 0 },
 	    {	0xffff,	0xffff,	0,	0	},
 	    {
 		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
@@ -1861,7 +1861,7 @@ const struct puc_device_description puc_
 
 	/* Intel EG20T UART */
 	{   "Intel EG20T UART #2",
-	    {	PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_2, 0, 2 },
+	    {	PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_2, 0, 0 },
 	    {	0xffff,	0xffff,	0,	0	},
 	    {
 		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
@@ -1870,7 +1870,7 @@ const struct puc_device_description puc_
 
 	/* Intel EG20T UART */
 	{   "Intel EG20T UART #3",
-	    {	PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_3, 0, 3 },
+	    {	PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_3, 0, 0 },
 	    {	0xffff,	0xffff,	0,	0	},
 	    {
 		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },

Reply via email to