Module Name: src
Committed By: msaitoh
Date: Sun Jan 26 10:20:20 UTC 2014
Modified Files:
src/sys/dev/pci: pucdata.c
Log Message:
Add some OXPCIe952 devices.
To generate a diff of this commit:
cvs rdiff -u -r1.91 -r1.92 src/sys/dev/pci/pucdata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/pucdata.c
diff -u src/sys/dev/pci/pucdata.c:1.91 src/sys/dev/pci/pucdata.c:1.92
--- src/sys/dev/pci/pucdata.c:1.91 Thu Jan 23 17:21:06 2014
+++ src/sys/dev/pci/pucdata.c Sun Jan 26 10:20:20 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: pucdata.c,v 1.91 2014/01/23 17:21:06 msaitoh Exp $ */
+/* $NetBSD: pucdata.c,v 1.92 2014/01/26 10:20:20 msaitoh Exp $ */
/*
* Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.91 2014/01/23 17:21:06 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.92 2014/01/26 10:20:20 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -1020,15 +1020,85 @@ const struct puc_device_description puc_
},
/* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_0,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_1,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
{ "Oxford Semiconductor OXPCIe952 UARTs",
- { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952,
- PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952 },
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2S,
+ PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2S },
{ 0xffff, 0xffff, 0xffff, 0xffff },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
},
},
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_3,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_4,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_5,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
+ /* Oxford Semiconductor OXPCIe952 PCIe UARTs */
+ { "Oxford Semiconductor OXPCIe952 UART",
+ { PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_6,
+ 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ },
+ },
+
/* Oxford Semiconductor OXmPCI952 PCI UARTs */
{ "Oxford Semiconductor OXmPCI952 UARTs",
{ PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_EXSYS_EX41092,
