Module Name: src
Committed By: hkenken
Date: Sat Mar 22 04:55:00 UTC 2014
Modified Files:
src/sys/arch/arm/imx: files.imx51 imxwdogreg.h
Added Files:
src/sys/arch/arm/imx: imx51_wdog.c imxwdog.c imxwdogvar.h
Log Message:
add Watchdog Timer support for i.MX51.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/files.imx51
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx51_wdog.c \
src/sys/arch/arm/imx/imxwdog.c src/sys/arch/arm/imx/imxwdogvar.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imxwdogreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.5 src/sys/arch/arm/imx/files.imx51:1.6
--- src/sys/arch/arm/imx/files.imx51:1.5 Thu Apr 19 09:53:53 2012
+++ src/sys/arch/arm/imx/files.imx51 Sat Mar 22 04:55:00 2014
@@ -1,4 +1,4 @@
-# $NetBSD: files.imx51,v 1.5 2012/04/19 09:53:53 bsh Exp $
+# $NetBSD: files.imx51,v 1.6 2014/03/22 04:55:00 hkenken Exp $
#
# Configuration info for the Freescale i.MX51
#
@@ -45,6 +45,12 @@ defparam opt_imx51clk.h IMX51_OSC_FREQ
defparam opt_imx51clk.h IMX51_AHBCLK_FREQ
defparam opt_imx51clk.h IMX51_IPGCLK_FREQ
+# Watchdog
+device imxwdog: sysmon_wdog
+attach imxwdog at axi
+file arch/arm/imx/imx51_wdog.c imxwdog
+file arch/arm/imx/imxwdog.c imxwdog
+
# iMX GPIO
device imxgpio: gpiobus
attach imxgpio at axi
Index: src/sys/arch/arm/imx/imxwdogreg.h
diff -u src/sys/arch/arm/imx/imxwdogreg.h:1.1 src/sys/arch/arm/imx/imxwdogreg.h:1.2
--- src/sys/arch/arm/imx/imxwdogreg.h:1.1 Sat Nov 13 07:11:03 2010
+++ src/sys/arch/arm/imx/imxwdogreg.h Sat Mar 22 04:55:00 2014
@@ -42,20 +42,8 @@
* 2/2010
*/
-#ifndef IMXWDOGREG_H
-#define IMXWDOGREG_H
-
-#ifdef _LOCORE
-#ifndef __BIT
-#define __BIT(n) (1<<(n))
-#endif
-#ifndef __BITS
-#define __BITS(hi,lo) (((1<<((hi)+1))-1) & ~((1<<((lo))-1))
-#endif
-#else
-#include <sys/cdefs.h>
-#endif
-
+#ifndef _ARM_IMX_IMXWDOGREG_H
+#define _ARM_IMX_IMXWDOGREG_H
#define IMX_WDOG_WCR 0x0000 /* Watchdog Control Register */
#define WCR_WDZST __BIT(0) /* watchdog low power */
@@ -65,9 +53,7 @@
#define WCR_SRS __BIT(4) /* software reset signal */
#define WCR_WDA __BIT(5) /* ipp_wdog* assertion */
#define WCR_WDW __BIT(7) /* disable for wait */
-#define WCR_WT_SHIFT 8
-#define WCR_WT_LEN 8
-#define WCR_WT_MASK __BIT(WCR_WT_SHIFT+WCR_WT_LEN-1, WCR_WT_SHIFT)
+#define WCR_WT __BITS(15, 8)
/* watchdog timeout
0=0.5sec 0xff=128sec */
@@ -86,17 +72,14 @@
#define WRSR_PWR __BIT(4)
#define WRSR_JRST __BIT(5)
-
/* only for i.MX51 */
#define IMX_WDOG_WICR 0x0006 /* Watchdog Interrupt Control Register */
-#define WICR_WICT_LEN 8
-#define WICR_WICT_MASK __BITS(WICT_LEN-1,0) /* interrupt count timeout */
+#define WICR_WICT __BITS(7,0) /* interrupt count timeout */
#define WICR_WTIS __BIT(14) /* interrupt status [w1c] */
#define WICR_WIE __BIT(15) /* interrupt enable */
-
/* only for i.MX51 */
#define IMX_WDOG_WMCR 0x0008
#define WMCR_PDE __BIT(0) /* power down enable */
-#endif
+#endif /* _ARM_IMX_IMXWDOGREG_H */
Added files:
Index: src/sys/arch/arm/imx/imx51_wdog.c
diff -u /dev/null src/sys/arch/arm/imx/imx51_wdog.c:1.1
--- /dev/null Sat Mar 22 04:55:00 2014
+++ src/sys/arch/arm/imx/imx51_wdog.c Sat Mar 22 04:55:00 2014
@@ -0,0 +1,62 @@
+/* $NetBSD: imx51_wdog.c,v 1.1 2014/03/22 04:55:00 hkenken Exp $ */
+
+/*
+ * Copyright (c) 2010 Genetec Corporation. All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: imx51_wdog.c,v 1.1 2014/03/22 04:55:00 hkenken Exp $");
+
+#include "opt_imx.h"
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/bus.h>
+
+#include <arm/imx/imx51var.h>
+#include <arm/imx/imx51reg.h>
+#include <arm/imx/imxwdogvar.h>
+
+int
+wdog_match(device_t parent, struct cfdata *cf, void *aux)
+{
+ struct axi_attach_args *aa = aux;
+
+ switch (aa->aa_addr) {
+ case WDOG1_BASE:
+ return 1;
+ }
+
+ return (0);
+}
+
+void
+wdog_attach(device_t parent, device_t self, void *aux)
+{
+ struct axi_attach_args *aa = aux;
+
+ wdog_attach_common(parent, self, aa->aa_iot, aa->aa_addr,
+ WDOG_SIZE, aa->aa_irq);
+}
Index: src/sys/arch/arm/imx/imxwdog.c
diff -u /dev/null src/sys/arch/arm/imx/imxwdog.c:1.1
--- /dev/null Sat Mar 22 04:55:00 2014
+++ src/sys/arch/arm/imx/imxwdog.c Sat Mar 22 04:55:00 2014
@@ -0,0 +1,189 @@
+/* $NetBSD: imxwdog.c,v 1.1 2014/03/22 04:55:00 hkenken Exp $ */
+
+/*
+ * Copyright (c) 2010 Genetec Corporation. All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: imxwdog.c,v 1.1 2014/03/22 04:55:00 hkenken Exp $");
+
+#include "opt_imx.h"
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/cpu.h>
+#include <sys/device.h>
+#include <sys/wdog.h>
+
+#include <prop/proplib.h>
+
+#include <dev/sysmon/sysmonvar.h>
+
+#include <arm/imx/imxwdogreg.h>
+#include <arm/imx/imxwdogvar.h>
+
+struct wdog_softc {
+ struct sysmon_wdog sc_smw;
+ device_t sc_dev;
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
+
+ u_int sc_wdog_max_period;
+ u_int sc_wdog_period;
+ bool sc_wdog_armed;
+};
+
+#ifndef IMXWDOG_PERIOD_DEFAULT
+#define IMXWDOG_PERIOD_DEFAULT 10
+#endif
+
+CFATTACH_DECL_NEW(imxwdog, sizeof(struct wdog_softc),
+ wdog_match, wdog_attach, NULL, NULL);
+
+static inline uint16_t
+wdog_read(struct wdog_softc *sc, bus_size_t o)
+{
+ return bus_space_read_2(sc->sc_iot, sc->sc_ioh, o);
+}
+
+static inline void
+wdog_write(struct wdog_softc *sc, bus_size_t o, uint16_t v)
+{
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, o, v);
+}
+
+static int
+wdog_tickle(struct sysmon_wdog *smw)
+{
+ struct wdog_softc * const sc = smw->smw_cookie;
+
+ wdog_write(sc, IMX_WDOG_WSR, WSR_MAGIC1);
+ wdog_write(sc, IMX_WDOG_WSR, WSR_MAGIC2);
+
+ return 0;
+}
+
+static int
+wdog_setmode(struct sysmon_wdog *smw)
+{
+ struct wdog_softc * const sc = smw->smw_cookie;
+ uint16_t reg;
+
+ if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
+ /* this chip do not support wdt disable */
+ aprint_debug_dev(sc->sc_dev, "setmode disable\n");
+ return sc->sc_wdog_armed ? EBUSY : 0;
+ }
+
+ /*
+ * If no changes, just tickle it and return.
+ */
+ if (sc->sc_wdog_armed && smw->smw_period == sc->sc_wdog_period) {
+ wdog_tickle(smw);
+ aprint_debug_dev(sc->sc_dev, "setmode refresh\n");
+ return 0;
+ }
+
+ /* set default */
+ if (smw->smw_period == WDOG_PERIOD_DEFAULT) {
+ sc->sc_wdog_period = IMXWDOG_PERIOD_DEFAULT;
+ smw->smw_period = IMXWDOG_PERIOD_DEFAULT;
+ }
+
+ /*
+ * Make sure we don't overflow the counter.
+ */
+ if (smw->smw_period >= sc->sc_wdog_max_period)
+ return EINVAL;
+
+ sc->sc_wdog_period = smw->smw_period;
+ sc->sc_wdog_armed = true;
+
+ reg = wdog_read(sc, IMX_WDOG_WCR);
+ reg &= ~WCR_WT;
+ reg |= __SHIFTIN(sc->sc_wdog_period * 2 - 1, WCR_WT);
+ reg |= WCR_WDE;
+ wdog_write(sc, IMX_WDOG_WCR, reg);
+
+ return 0;
+}
+
+void
+wdog_attach_common(struct device *parent, struct device *self,
+ bus_space_tag_t iot, paddr_t addr, size_t size, int irq)
+{
+ struct wdog_softc *sc = device_private(self);
+ uint16_t reg;
+
+ sc->sc_dev = self;
+ sc->sc_iot = iot;
+ if (bus_space_map(iot, addr, size, 0, &sc->sc_ioh)) {
+ aprint_error_dev(self, "can't map\n");
+ return;
+ }
+
+ sc->sc_wdog_armed = __SHIFTOUT(wdog_read(sc, IMX_WDOG_WCR), WCR_WDE);
+ /*
+ * Does the config file tell us to turn on the watchdog?
+ */
+ if (device_cfdata(self)->cf_flags & 1)
+ sc->sc_wdog_armed = true;
+
+ sc->sc_wdog_max_period = 0xff / 2;
+ sc->sc_wdog_period = IMXWDOG_PERIOD_DEFAULT;
+
+ reg = wdog_read(sc, IMX_WDOG_WCR);
+ reg &= ~WCR_WT;
+ reg |= __SHIFTIN(sc->sc_wdog_period * 2 - 1, WCR_WT);
+ wdog_write(sc, IMX_WDOG_WCR, reg);
+
+ aprint_naive("\n");
+ aprint_normal(": i.MX Watchdog Timer, default period is %u seconds%s\n",
+ sc->sc_wdog_period,
+ sc->sc_wdog_armed ? " (armed)" : "");
+
+ sc->sc_smw.smw_name = device_xname(self);
+ sc->sc_smw.smw_cookie = sc;
+ sc->sc_smw.smw_setmode = wdog_setmode;
+ sc->sc_smw.smw_tickle = wdog_tickle;
+ sc->sc_smw.smw_period = sc->sc_wdog_period;
+
+ if (sysmon_wdog_register(&sc->sc_smw) != 0)
+ aprint_error_dev(self, "unable to register with sysmon\n");
+
+ if (sc->sc_wdog_armed) {
+ int error = sysmon_wdog_setmode(&sc->sc_smw, WDOG_MODE_KTICKLE,
+ sc->sc_wdog_period);
+ if (error)
+ aprint_error_dev(self,
+ "failed to start kernel tickler: %d\n", error);
+ else {
+ reg = wdog_read(sc, IMX_WDOG_WCR);
+ reg |= WCR_WDE;
+ wdog_write(sc, IMX_WDOG_WCR, reg);
+ }
+ }
+}
+
Index: src/sys/arch/arm/imx/imxwdogvar.h
diff -u /dev/null src/sys/arch/arm/imx/imxwdogvar.h:1.1
--- /dev/null Sat Mar 22 04:55:00 2014
+++ src/sys/arch/arm/imx/imxwdogvar.h Sat Mar 22 04:55:00 2014
@@ -0,0 +1,36 @@
+/* $NetBSD: imxwdogvar.h,v 1.1 2014/03/22 04:55:00 hkenken Exp $ */
+
+/*
+ * Copyright (c) 2010 Genetec Corporation. All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ARM_IMX_IMXWDOGVAR_H
+#define _ARM_IMX_IMXWDOGVAR_H
+
+extern int wdog_match(device_t, cfdata_t, void *);
+extern void wdog_attach(device_t, device_t, void *);
+extern void wdog_attach_common(device_t, device_t, bus_space_tag_t, paddr_t, size_t, int);
+
+#endif /* _ARM_IMX_IMXWDOGVAR_H */
