Module Name: src
Committed By: macallan
Date: Sat Mar 7 15:36:16 UTC 2015
Modified Files:
src/sys/arch/mips/ingenic: ingenic_regs.h
Log Message:
add memory controller registers
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/ingenic/ingenic_regs.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/ingenic/ingenic_regs.h
diff -u src/sys/arch/mips/ingenic/ingenic_regs.h:1.6 src/sys/arch/mips/ingenic/ingenic_regs.h:1.7
--- src/sys/arch/mips/ingenic/ingenic_regs.h:1.6 Thu Dec 25 05:10:00 2014
+++ src/sys/arch/mips/ingenic/ingenic_regs.h Sat Mar 7 15:36:16 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: ingenic_regs.h,v 1.6 2014/12/25 05:10:00 macallan Exp $ */
+/* $NetBSD: ingenic_regs.h,v 1.7 2015/03/07 15:36:16 macallan Exp $ */
/*-
* Copyright (c) 2014 Michael Lorenz
@@ -249,4 +249,11 @@ MFC0(uint32_t r, uint32_t s)
#define JZ_DMR1 0x10001044 /* mask for PDMA */
#define JZ_DPR1 0x10001048 /* pending for PDMA */
+/* memory controller */
+#define JZ_DMMAP0 0x13010024
+#define JZ_DMMAP1 0x13010028
+ #define DMMAP_BASE 0x0000ff00 /* base PADDR of memory chunk */
+ #define DMMAP_MASK 0x000000ff /* mask which bits of PADDR are
+ * constant */
+
#endif /* INGENIC_REGS_H */
