Module Name: src
Committed By: skrll
Date: Sun Apr 12 17:32:39 UTC 2015
Modified Files:
src/sys/arch/arm/broadcom: bcm2835_intr.c bcm2835_intr.h bcm2835_obio.c
bcm2835reg.h
src/sys/arch/evbarm/rpi: rpi_machdep.c
Log Message:
RPI2 MP support.
Thanks to Matt Thomas for making this possible with his changes to pic.c
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/broadcom/bcm2835_intr.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/broadcom/bcm2835_intr.h
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/broadcom/bcm2835_obio.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/broadcom/bcm2835reg.h
cvs rdiff -u -r1.60 -r1.61 src/sys/arch/evbarm/rpi/rpi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm2835_intr.c
diff -u src/sys/arch/arm/broadcom/bcm2835_intr.c:1.7 src/sys/arch/arm/broadcom/bcm2835_intr.c:1.8
--- src/sys/arch/arm/broadcom/bcm2835_intr.c:1.7 Thu Mar 5 14:27:25 2015
+++ src/sys/arch/arm/broadcom/bcm2835_intr.c Sun Apr 12 17:32:39 2015
@@ -1,7 +1,7 @@
-/* $NetBSD: bcm2835_intr.c,v 1.7 2015/03/05 14:27:25 skrll Exp $ */
+/* $NetBSD: bcm2835_intr.c,v 1.8 2015/04/12 17:32:39 skrll Exp $ */
/*-
- * Copyright (c) 2012 The NetBSD Foundation, Inc.
+ * Copyright (c) 2012, 2015 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.7 2015/03/05 14:27:25 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.8 2015/04/12 17:32:39 skrll Exp $");
#define _INTR_PRIVATE
@@ -67,21 +67,12 @@ static int bcm2836mp_pic_find_pending_ir
static void bcm2836mp_pic_establish_irq(struct pic_softc *, struct intrsource *);
static void bcm2836mp_pic_source_name(struct pic_softc *, int, char *,
size_t);
-#if 0
#ifdef MULTIPROCESSOR
int bcm2836mp_ipi_handler(void *);
static void bcm2836mp_cpu_init(struct pic_softc *, struct cpu_info *);
static void bcm2836mp_send_ipi(struct pic_softc *, const kcpuset_t *, u_long);
#endif
#endif
-#endif
-
-#ifdef MULTIPROCESSOR
-static void
-bcm2835_dummy(struct pic_softc *pic, const kcpuset_t *kcp, u_long ipi)
-{
-}
-#endif
static int bcm2835_icu_match(device_t, cfdata_t, void *);
static void bcm2835_icu_attach(device_t, device_t, void *);
@@ -92,9 +83,6 @@ static struct pic_ops bcm2835_picops = {
.pic_find_pending_irqs = bcm2835_pic_find_pending_irqs,
.pic_establish_irq = bcm2835_pic_establish_irq,
.pic_source_name = bcm2835_pic_source_name,
-#if defined(MULTIPROCESSOR)
- .pic_ipi_send = bcm2835_dummy,
-#endif
};
struct pic_softc bcm2835_pic = {
@@ -110,16 +98,33 @@ static struct pic_ops bcm2836mp_picops =
.pic_find_pending_irqs = bcm2836mp_pic_find_pending_irqs,
.pic_establish_irq = bcm2836mp_pic_establish_irq,
.pic_source_name = bcm2836mp_pic_source_name,
-#if 0 && defined(MULTIPROCESSOR)
+#if defined(MULTIPROCESSOR)
.pic_cpu_init = bcm2836mp_cpu_init,
.pic_ipi_send = bcm2836mp_send_ipi,
#endif
};
-struct pic_softc bcm2836mp_pic = {
- .pic_ops = &bcm2836mp_picops,
- .pic_maxsources = BCM2836MP_NIRQ,
- .pic_name = "bcm2836 mp pic",
+struct pic_softc bcm2836mp_pic[BCM2836_NCPUS] = {
+ [0] = {
+ .pic_ops = &bcm2836mp_picops,
+ .pic_maxsources = BCM2836_NIRQPERCPU,
+ .pic_name = "bcm2836 pic",
+ },
+ [1] = {
+ .pic_ops = &bcm2836mp_picops,
+ .pic_maxsources = BCM2836_NIRQPERCPU,
+ .pic_name = "bcm2836 pic",
+ },
+ [2] = {
+ .pic_ops = &bcm2836mp_picops,
+ .pic_maxsources = BCM2836_NIRQPERCPU,
+ .pic_name = "bcm2836 pic",
+ },
+ [3] = {
+ .pic_ops = &bcm2836mp_picops,
+ .pic_maxsources = BCM2836_NIRQPERCPU,
+ .pic_name = "bcm2836 pic",
+ },
};
#endif
@@ -165,7 +170,7 @@ static const char * const bcm2835_source
};
#if defined(BCM2836)
-static const char * const bcm2836mp_sources[BCM2836MP_NIRQ] = {
+static const char * const bcm2836mp_sources[BCM2836_NIRQPERCPU] = {
"cntpsirq", "cntpnsirq", "cnthpirq", "cntvirq",
"mailbox0", "mailbox1", "mailbox2", "mailbox3",
};
@@ -211,14 +216,14 @@ bcm2835_icu_attach(device_t parent, devi
bcmicu_sc = sc;
- pic_add(sc->sc_pic, 0);
-
#if defined(BCM2836)
-#if 0 && defined(MULTIPROCESSOR)
+#if defined(MULTIPROCESSOR)
aprint_normal(": Multiprocessor");
#endif
- pic_add(&bcm2836mp_pic, BCM2836_INT_LOCALBASE);
+
+ bcm2836mp_intr_init(curcpu());
#endif
+ pic_add(sc->sc_pic, BCM2835_INT_BASE);
aprint_normal("\n");
}
@@ -228,15 +233,18 @@ bcm2835_irq_handler(void *frame)
{
struct cpu_info * const ci = curcpu();
const int oldipl = ci->ci_cpl;
+ const cpuid_t cpuid = ci->ci_cpuid;
const uint32_t oldipl_mask = __BIT(oldipl);
int ipl_mask = 0;
ci->ci_data.cpu_nintr++;
bcm2835_barrier();
- ipl_mask = bcm2835_pic_find_pending_irqs(&bcm2835_pic);
+ if (cpuid == 0) {
+ ipl_mask = bcm2835_pic_find_pending_irqs(&bcm2835_pic);
+ }
#if defined(BCM2836)
- ipl_mask |= bcm2836mp_pic_find_pending_irqs(&bcm2836mp_pic);
+ ipl_mask |= bcm2836mp_pic_find_pending_irqs(&bcm2836mp_pic[cpuid]);
#endif
/*
@@ -283,8 +291,8 @@ bcm2835_pic_find_pending_irqs(struct pic
gpu1irq = bpending & BCM2835_INTBIT_GPU1;
if (armirq) {
- ipl |= pic_mark_pending_sources(pic, BCM2835_INT_BASICBASE,
- armirq);
+ ipl |= pic_mark_pending_sources(pic,
+ BCM2835_INT_BASICBASE - BCM2835_INT_BASE, armirq);
}
@@ -292,15 +300,15 @@ bcm2835_pic_find_pending_irqs(struct pic
uint32_t pending1;
pending1 = read_bcm2835reg(BCM2835_INTC_IRQ1PENDING);
- ipl |= pic_mark_pending_sources(pic, BCM2835_INT_GPU0BASE,
- pending1);
+ ipl |= pic_mark_pending_sources(pic,
+ BCM2835_INT_GPU0BASE - BCM2835_INT_BASE, pending1);
}
if (gpu1irq || (bpending & BCM2835_INTBIT_PENDING2)) {
uint32_t pending2;
pending2 = read_bcm2835reg(BCM2835_INTC_IRQ2PENDING);
- ipl |= pic_mark_pending_sources(pic, BCM2835_INT_GPU1BASE,
- pending2);
+ ipl |= pic_mark_pending_sources(pic,
+ BCM2835_INT_GPU1BASE - BCM2835_INT_BASE, pending2);
}
return ipl;
@@ -329,15 +337,17 @@ bcm2835_pic_source_name(struct pic_softc
#define BCM2836MP_MAILBOX_IRQS __BITS(4,4)
#define BCM2836MP_ALL_IRQS \
- (BCM2836MP_TIMER_IRQS | BCM2836MP_MAILBOX_IRQS)
+ (BCM2836MP_TIMER_IRQS | BCM2836MP_MAILBOX_IRQS)
static void
bcm2836mp_pic_unblock_irqs(struct pic_softc *pic, size_t irqbase,
uint32_t irq_mask)
{
- const int cpuid = 0;
+ struct cpu_info * const ci = curcpu();
+ const cpuid_t cpuid = ci->ci_cpuid;
-//printf("%s: irqbase %zu irq_mask %08x\n", __func__, irqbase, irq_mask);
+ KASSERT(pic == &bcm2836mp_pic[cpuid]);
+ KASSERT(irqbase == 0);
if (irq_mask & BCM2836MP_TIMER_IRQS) {
uint32_t mask = __SHIFTOUT(irq_mask, BCM2836MP_TIMER_IRQS);
@@ -351,7 +361,6 @@ bcm2836mp_pic_unblock_irqs(struct pic_so
BCM2836_LOCAL_TIMER_IRQ_CONTROL_BASE,
BCM2836_LOCAL_TIMER_IRQ_CONTROL_SIZE,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
-//printf("%s: val %08x\n", __func__, val);
} else if (irq_mask & BCM2836MP_MAILBOX_IRQS) {
uint32_t mask = __SHIFTOUT(irq_mask, BCM2836MP_MAILBOX_IRQS);
uint32_t val = bus_space_read_4(al_iot, al_ioh,
@@ -373,9 +382,12 @@ static void
bcm2836mp_pic_block_irqs(struct pic_softc *pic, size_t irqbase,
uint32_t irq_mask)
{
- const int cpuid = 0;
+ struct cpu_info * const ci = curcpu();
+ const cpuid_t cpuid = ci->ci_cpuid;
+
+ KASSERT(pic == &bcm2836mp_pic[cpuid]);
+ KASSERT(irqbase == 0);
-//printf("%s: irqbase %zu irq_mask %08x\n", __func__, irqbase, irq_mask);
if (irq_mask & BCM2836MP_TIMER_IRQS) {
uint32_t mask = __SHIFTOUT(irq_mask, BCM2836MP_TIMER_IRQS);
uint32_t val = bus_space_read_4(al_iot, al_ioh,
@@ -384,7 +396,6 @@ bcm2836mp_pic_block_irqs(struct pic_soft
bus_space_write_4(al_iot, al_ioh,
BCM2836_LOCAL_TIMER_IRQ_CONTROLN(cpuid),
val);
-//printf("%s: val %08x\n", __func__, val);
} else if (irq_mask & BCM2836MP_MAILBOX_IRQS) {
uint32_t mask = __SHIFTOUT(irq_mask, BCM2836MP_MAILBOX_IRQS);
uint32_t val = bus_space_read_4(al_iot, al_ioh,
@@ -399,14 +410,16 @@ bcm2836mp_pic_block_irqs(struct pic_soft
return;
}
-
static int
bcm2836mp_pic_find_pending_irqs(struct pic_softc *pic)
{
- const int cpuid = 0;
+ struct cpu_info * const ci = curcpu();
+ const cpuid_t cpuid = ci->ci_cpuid;
uint32_t lpending;
int ipl = 0;
+ KASSERT(pic == &bcm2836mp_pic[cpuid]);
+
bcm2835_barrier();
lpending = bus_space_read_4(al_iot, al_ioh,
@@ -424,19 +437,99 @@ bcm2836mp_pic_find_pending_irqs(struct p
static void
bcm2836mp_pic_establish_irq(struct pic_softc *pic, struct intrsource *is)
{
-
/* Nothing really*/
KASSERT(is->is_irq >= 0);
- KASSERT(is->is_irq < BCM2836MP_NIRQ);
-// KASSERT(is->is_type == IST_LEVEL);
-
-
+ KASSERT(is->is_irq < BCM2836_NIRQPERCPU);
}
static void
bcm2836mp_pic_source_name(struct pic_softc *pic, int irq, char *buf, size_t len)
{
- irq %= 32;
+
+ irq %= BCM2836_NIRQPERCPU;
strlcpy(buf, bcm2836mp_sources[irq], len);
}
+
+
+#ifdef MULTIPROCESSOR
+static void bcm2836mp_cpu_init(struct pic_softc *pic, struct cpu_info *ci)
+{
+
+ /* Enable IRQ and not FIQ */
+ bus_space_write_4(al_iot, al_ioh,
+ BCM2836_LOCAL_MAILBOX_IRQ_CONTROLN(ci->ci_cpuid), 1);
+}
+
+
+static void
+bcm2836mp_send_ipi(struct pic_softc *pic, const kcpuset_t *kcp, u_long ipi)
+{
+ const cpuid_t cpuid = pic - &bcm2836mp_pic[0];
+
+ bus_space_write_4(al_iot, al_ioh,
+ BCM2836_LOCAL_MAILBOX0_SETN(cpuid), ipi);
+}
+
+int
+bcm2836mp_ipi_handler(void *priv)
+{
+ const struct cpu_info *ci = curcpu();
+ const cpuid_t cpuid = ci->ci_cpuid;
+ const uint32_t ipi = bus_space_read_4(al_iot, al_ioh,
+ BCM2836_LOCAL_MAILBOX0_CLRN(cpuid));
+
+ bus_space_write_4(al_iot, al_ioh, BCM2836_LOCAL_MAILBOX0_CLRN(cpuid),
+ ipi);
+
+ switch (ipi) {
+ case IPI_AST:
+ case IPI_NOP:
+ pic_ipi_nop(priv);
+ break;
+ case IPI_XCALL:
+ pic_ipi_xcall(priv);
+ break;
+ case IPI_GENERIC:
+ pic_ipi_generic(priv);
+ break;
+ case IPI_SHOOTDOWN:
+ pic_ipi_shootdown(priv);
+ break;
+#ifdef DDB
+ case IPI_DDB:
+ pic_ipi_ddb(priv);
+ break;
+#endif
+#ifdef __HAVE_PREEMPTION
+ case IPI_KPREEMPT:
+ pic_ipi_nop(priv);
+ break;
+#endif
+ }
+
+ return 1;
+}
+
+void
+bcm2836mp_intr_init(struct cpu_info *ci)
+{
+ const cpuid_t cpuid = ci->ci_cpuid;
+ struct pic_softc * const pic = &bcm2836mp_pic[cpuid];
+
+ pic->pic_cpus = ci->ci_kcpuset;
+ pic_add(pic, BCM2836_INT_BASECPUN(cpuid));
+
+ intr_establish(BCM2836_INT_MAILBOX0_CPUN(cpuid), IPL_VM,
+ IST_LEVEL | IST_MPSAFE, bcm2836mp_ipi_handler, NULL);
+
+ /* clock interrupt will attach with gtmr */
+ if (cpuid == 0)
+ return;
+
+ intr_establish(BCM2836_INT_CNTVIRQ_CPUN(cpuid), IPL_CLOCK,
+ IST_LEVEL | IST_MPSAFE, gtmr_intr, NULL);
+
+}
+#endif
+
#endif
Index: src/sys/arch/arm/broadcom/bcm2835_intr.h
diff -u src/sys/arch/arm/broadcom/bcm2835_intr.h:1.1 src/sys/arch/arm/broadcom/bcm2835_intr.h:1.2
--- src/sys/arch/arm/broadcom/bcm2835_intr.h:1.1 Thu Jul 26 06:21:57 2012
+++ src/sys/arch/arm/broadcom/bcm2835_intr.h Sun Apr 12 17:32:39 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_intr.h,v 1.1 2012/07/26 06:21:57 skrll Exp $ */
+/* $NetBSD: bcm2835_intr.h,v 1.2 2015/04/12 17:32:39 skrll Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -38,8 +38,8 @@
void bcm2835_irq_handler(void *);
-#define PIC_MAXSOURCES 96
-#define PIC_MAXMAXSOURCES 128
+#define PIC_MAXSOURCES 96 + (4*32)
+#define PIC_MAXMAXSOURCES 96 + (4*32) + 32
#include <arm/pic/picvar.h>
@@ -50,6 +50,8 @@ bcm2835_intr_establish(int irq, int ipl,
return intr_establish(irq, ipl, IST_LEVEL, func, arg);
}
+void bcm2836mp_intr_init(struct cpu_info *);
+
#endif /* _LOCORE */
#endif /* _BCM2835_INTR_H_ */
Index: src/sys/arch/arm/broadcom/bcm2835_obio.c
diff -u src/sys/arch/arm/broadcom/bcm2835_obio.c:1.24 src/sys/arch/arm/broadcom/bcm2835_obio.c:1.25
--- src/sys/arch/arm/broadcom/bcm2835_obio.c:1.24 Wed Mar 4 17:02:17 2015
+++ src/sys/arch/arm/broadcom/bcm2835_obio.c Sun Apr 12 17:32:39 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_obio.c,v 1.24 2015/03/04 17:02:17 skrll Exp $ */
+/* $NetBSD: bcm2835_obio.c,v 1.25 2015/04/12 17:32:39 skrll Exp $ */
/*-
* Copyright (c) 2012, 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_obio.c,v 1.24 2015/03/04 17:02:17 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_obio.c,v 1.25 2015/04/12 17:32:39 skrll Exp $");
#include "locators.h"
#include "obio.h"
@@ -38,10 +38,10 @@ __KERNEL_RCSID(0, "$NetBSD: bcm2835_obio
#include "opt_bcm283x.h"
#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-
#include <sys/bus.h>
+#include <sys/cpu.h>
+#include <sys/device.h>
+#include <sys/systm.h>
#include <arm/broadcom/bcm2835reg.h>
#include <arm/broadcom/bcm2835var.h>
@@ -262,7 +262,6 @@ obio_attach(device_t parent, device_t se
.mpcaa_irq = ad->ad_intr,
};
-
config_found(self, &mpcaa, NULL);
continue;
}
@@ -314,5 +313,9 @@ obio_print(void *aux, const char *name)
void
bcm2836_cpu_hatch(struct cpu_info *ci)
{
+
+ bcm2836mp_intr_init(ci);
+
+ gtmr_init_cpu_clock(ci);
}
#endif
Index: src/sys/arch/arm/broadcom/bcm2835reg.h
diff -u src/sys/arch/arm/broadcom/bcm2835reg.h:1.14 src/sys/arch/arm/broadcom/bcm2835reg.h:1.15
--- src/sys/arch/arm/broadcom/bcm2835reg.h:1.14 Sat Feb 28 09:34:34 2015
+++ src/sys/arch/arm/broadcom/bcm2835reg.h Sun Apr 12 17:32:39 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835reg.h,v 1.14 2015/02/28 09:34:34 skrll Exp $ */
+/* $NetBSD: bcm2835reg.h,v 1.15 2015/04/12 17:32:39 skrll Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -83,7 +83,7 @@
#define BCM2835_USB_SIZE 0x20000
#define BCM2835_DMA15_SIZE 0x100
-#define BCM2835_IOPHYSTOVIRT(a) \
+#define BCM2835_IOPHYSTOVIRT(a) \
((0xf0000000 | (((a) & 0xf0000000) >> 4)) + ((a) & ~0xff000000))
#define BCM2835_BUSADDR_CACHE_MASK 0xc0000000
@@ -127,8 +127,40 @@
#define BCM2835_INTC_ENABLEBASE (BCM2835_INTC_BASE + 0x10)
#define BCM2835_INTC_DISABLEBASE (BCM2835_INTC_BASE + 0x1c)
-/* Interrupt source */
-#define BCM2835_INT_GPU0BASE 0
+#if defined(BCM2836)
+#define BCM2836_NCPUS 4
+#define BCM2836_NIRQPERCPU 32
+
+#define BCM2836_INT_LOCALBASE 0
+#define BCM2836_INT_BASECPUN(n) (BCM2836_INT_LOCALBASE + ((n) * BCM2836_NIRQPERCPU))
+#define BCM2836_NIRQ (BCM2836_NIRQPERCPU * BCM2836_NCPUS)
+
+#define BCM2835_INT_BASE BCM2836_NIRQ
+
+#define BCM2836_INT_CNTPSIRQ 0
+#define BCM2836_INT_CNTPNSIRQ 1
+#define BCM2836_INT_CNTHPIRQ 2
+#define BCM2836_INT_CNTVIRQ 3
+#define BCM2836_INT_MAILBOX0 4
+#define BCM2836_INT_MAILBOX1 5
+#define BCM2836_INT_MAILBOX2 6
+#define BCM2836_INT_MAILBOX3 7
+#define BCM2836_INT_GPU_FAST 8
+#define BCM2836_INT_PMU_FAST 9
+#define BCM2836_INT_ZERO 10
+#define BCM2836_INT_TIMER 11
+#define BCM2836_INT_NLOCAL 12
+
+#define BCM2836_INT_CNTVIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTVIRQ)
+#define BCM2836_INT_MAILBOX0_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_MAILBOX0)
+#else
+#define BCM2835_INT_BASE 0
+#endif /* !BCM2836 */
+
+/* Periperal Interrupt sources */
+#define BCM2835_NIRQ 96
+
+#define BCM2835_INT_GPU0BASE (BCM2835_INT_BASE + 0)
#define BCM2835_INT_TIMER0 (BCM2835_INT_GPU0BASE + 0)
#define BCM2835_INT_TIMER1 (BCM2835_INT_GPU0BASE + 1)
#define BCM2835_INT_TIMER2 (BCM2835_INT_GPU0BASE + 2)
@@ -140,7 +172,7 @@
#define BCM2835_INT_AUX (BCM2835_INT_GPU0BASE + 29)
#define BCM2835_INT_ARM (BCM2835_INT_GPU0BASE + 30)
-#define BCM2835_INT_GPU1BASE 32
+#define BCM2835_INT_GPU1BASE (BCM2835_INT_BASE + 32)
#define BCM2835_INT_GPIO0 (BCM2835_INT_GPU1BASE + 17)
#define BCM2835_INT_GPIO1 (BCM2835_INT_GPU1BASE + 18)
#define BCM2835_INT_GPIO2 (BCM2835_INT_GPU1BASE + 19)
@@ -151,7 +183,7 @@
#define BCM2835_INT_UART0 (BCM2835_INT_GPU1BASE + 25)
#define BCM2835_INT_EMMC (BCM2835_INT_GPU1BASE + 30)
-#define BCM2835_INT_BASICBASE 64
+#define BCM2835_INT_BASICBASE (BCM2835_INT_BASE + 64)
#define BCM2835_INT_ARMTIMER (BCM2835_INT_BASICBASE + 0)
#define BCM2835_INT_ARMMAILBOX (BCM2835_INT_BASICBASE + 1)
#define BCM2835_INT_ARMDOORBELL0 (BCM2835_INT_BASICBASE + 2)
@@ -161,31 +193,8 @@
#define BCM2835_INT_ILLEGALTYPE0 (BCM2835_INT_BASICBASE + 6)
#define BCM2835_INT_ILLEGALTYPE1 (BCM2835_INT_BASICBASE + 7)
-#define BCM2836_NCPUS 4
-
-#define BCM2836_INT_LOCALBASE 96
-
-#define BCM2836_INT_CNTPSIRQ 0
-#define BCM2836_INT_CNTPNSIRQ 1
-#define BCM2836_INT_CNTHPIRQ 2
-#define BCM2836_INT_CNTVIRQ 3
-#define BCM2836_INT_MAILBOX0 4
-#define BCM2836_INT_MAILBOX1 5
-#define BCM2836_INT_MAILBOX2 6
-#define BCM2836_INT_MAILBOX3 7
-#define BCM2836_INT_GPU_FAST 8
-#define BCM2836_INT_PMU_FAST 9
-#define BCM2836_INT_ZERO 10
-#define BCM2836_INT_TIMER 11
-#define BCM2836_INT_NLOCAL 12
-
-#define BCM2836_INT_CNTVIRQ_CPUN(n) (BCM2836_INT_LOCALBASE + ((n) * 32) + BCM2836_INT_CNTVIRQ)
-#define BCM2836_INT_MAILBOX0_CPUN(n) (BCM2836_INT_LOCALBASE + ((n) * 32) + BCM2836_INT_MAILBOX0)
-
-#define BCM2835_NIRQ 96
-#define BCM2836MP_NIRQ 32
-#define BCM2835_UART0_CLK 3000000
+#define BCM2835_UART0_CLK 3000000
#define BCM2836_ARM_LOCAL_VBASE \
BCM2835_IOPHYSTOVIRT(BCM2836_ARM_LOCAL_BASE)
Index: src/sys/arch/evbarm/rpi/rpi_machdep.c
diff -u src/sys/arch/evbarm/rpi/rpi_machdep.c:1.60 src/sys/arch/evbarm/rpi/rpi_machdep.c:1.61
--- src/sys/arch/evbarm/rpi/rpi_machdep.c:1.60 Sat Apr 11 15:29:58 2015
+++ src/sys/arch/evbarm/rpi/rpi_machdep.c Sun Apr 12 17:32:39 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: rpi_machdep.c,v 1.60 2015/04/11 15:29:58 skrll Exp $ */
+/* $NetBSD: rpi_machdep.c,v 1.61 2015/04/12 17:32:39 skrll Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rpi_machdep.c,v 1.60 2015/04/11 15:29:58 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rpi_machdep.c,v 1.61 2015/04/12 17:32:39 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_bcm283x.h"
@@ -534,11 +534,6 @@ rpi_bootstrap(void)
__func__, i);
}
}
-
- /*
- * XXXNH: Disable non-boot CPUs for now
- */
- arm_cpu_hatched = 0;
#endif
}
